If you're talking about the PLX chip on a Z77 board to allow tri or quad SLI, it will perform worse than a board that actually provides 40 true PCIE 3.0 lanes as 16/16/8 or 16/8/8/8 directly into the CPU, as well as adding more latency. The PLX chip just creates additional lanes between the cards on the bus, but they still end up travelling over the same 16 lanes into the CPU.
if what you say is true. then all the PLX chip is doing is juggling the traffic between tri or quad sli. it is still limited by the 16 lane to the cpu.
my previous understanding was that PLX takes pci lane from other peripheral and use it for gpu so in effect there is more than 16 lane to the cpu for gpu usage.
can someone clarify this or provide a link? depending on the price of 780 - may end up with 680 tri sli instead.