P-M with on North Bridge & Voltage Regulator

[Cooler]

http://www.anandtech.com/tradeshows/showdoc.aspx?i=2511
its about time Intel starting working on this.......

 

[Hacp]

I know I posted this in the Troll post, but since some people might avoid that...





One point.

Is the on die memory controller EVEN NEEDED??? With Intel's lower emphasis on clock speeds, and DDR2 memory already reaching over 1GHZ in frequency,ddr3 memory comming sometime in 2007, and more cache in our chips, is memory bottlenecking going to be an issue in the future? I Understand that it might be a bottleneck in dual core processors, but Intel has shown to be willing to have two seperate Frong Side Busses for each core..

From a pure buisiness standpoint, and on die memory controller would not be economical, especially if the memory controller fails, the whole chip is gone... Also, AMD has had problems with its memory controllers because of price issues. I know the Opetrons are fine because they use a more expensive memory controller, and I assume the yeilds Might be poorer because of that , but with AMD64s, there is still the 4x double side 2T issue.

 

[bobsmith1492]

It's not about the bandwidth; it's the latency.

 

[Hacp]

Apparently, Intel isn't as sensative to Latencies as much as AMD is.

http://www.xbitlabs.com/articles/memory/display/ddr2-oc1ghz.html

 

[Concillian]

Originally posted by: Hacp
Apparently, Intel isn't as sensative to Latencies as much as AMD is.

http://www.xbitlabs.com/articles/memory/display/ddr2-oc1ghz.html

It's quite possible that it is not sensitive to module latencies because the latency between NB and CPU is a larger factor. Much as you cannot see CPU speed increases much in gaming performance when you are video card limited or vice-versa.

The difference between overall latency between the AXP and A64 was quite large, though it is impossible to isolate how much that one factor benefitted the system performance as a whole, as there were many other factors involved in the AXP to A64 transition. Just realize that the module latency is only one factor to the overall latency. As the overall latency decreases, module latencies increase in importance.

Also for DDR2 operating at very high speeds, the latencies may correlate to numbers that aren't much larger than the numbers we're used to seeing for regular DDR. For example, 500 MHz DDR2 (1000 MHz effective speed) with 5 cycles of latency is the same as 2 cycles of latency for DDR at 200 MHz (PC3200)... 5-5-5 at DDR2-1000 is the same physical amount of time as 2-2-2 at DDR-400. (talking just module latency here, not total latency)

Latency is measured in terms of clock cycles, while what often actually matters is time. So you have to be careful with how you compare latencies when they are operating at significantly different speeds.

How it will factor for Intel is a moot point until the cores with integrated memory controller start coming out of Intel, these are quite a ways down the road, so no use in speculating now.

 

[Viditor]

Originally posted by: Hacp
Apparently, Intel isn't as sensative to Latencies as much as AMD is.

http://www.xbitlabs.com/articles/memory/display/ddr2-oc1ghz.html

If you double-check the link, it's referring to the Netburst chips (P4) not the P-M.
The PM should be much more sensitive to latency than the P4...
In addition, as cores increase in number, the FSB becomes a bandwidth bottleneck as well...

 

[Hacp]

Originally posted by: Viditor

Originally posted by: Hacp
Apparently, Intel isn't as sensative to Latencies as much as AMD is.

http://www.xbitlabs.com/articles/memory/display/ddr2-oc1ghz.html

If you double-check the link, it's referring to the Netburst chips (P4) not the P-M.
The PM should be much more sensitive to latency than the P4...
In addition, as cores increase in number, the FSB becomes a bandwidth bottleneck as well...

Any proof of that? Latency matters more when the memory bandwith isn't saturated, which is why AMD 64s like better timings. Because they have high speed bandwith in Hypertransport.

I'm not sure about the Pentium Ms, but more bandwith is always good for Dual core processors, as they need all the bandwith they can get. This is where the Integrated memory controller would fit in. But with Memory higher frequencies, do 2 cores even need an integrated memory controller? Sure, Intel is comming up with quad core Server chips, but don't they have 2 FSBs? (Excuse me if I'm wrong because I'm not following Intel that much heh. ) With DDR2 and DDR3 solving bandwith problems, and latencies improving also, why would Intel risk losing more cash due to poor yeilds for such low benefits? Its kinda like how AMD is not moving on to DDR2 right now because they will be required to change their memory controller for very few benefits.

Edit: Looks like DDR3 is going to officially hit 1600MHZ, and even might hit 2ghz.. Who knows. Thats in 2007+ though.

 

[Wahsapa]

im not so much impressed with the on-chip NB as i am the voltage regulator.

intel came out with all kinds of goodies this week