cbn
Lifer
- Mar 27, 2009
- 12,968
- 221
- 106
I do agree about the on package HBM and Pure Optane DIMMs being a logical progression, but that aside I am wondering about how different ways of stacking Optane could affect its performance tuning?
If additional TSVs are involved to increase parallelism per Optane die I'm thinking a DIMM slot would no longer provide enough bandwidth for even a modest amount of Optane.
If true, then we would be looking at moving the on-package HBM onto the processor die to make room for on-package (High TSV) Optane.
If additional TSVs are involved to increase parallelism per Optane die I'm thinking a DIMM slot would no longer provide enough bandwidth for even a modest amount of Optane.
If true, then we would be looking at moving the on-package HBM onto the processor die to make room for on-package (High TSV) Optane.