Oh. My. God. Read part of this review . . .

[XMan]

The Duron uses the same processing core as the Thunderbird, AMD's first high-end Athlon CPU, which includes support for AMD's 3DNow! multimedia instruction set, 128MB of L1 cache, and a 200MHz front-side bus.

Okay, a simple typo, right?

Further down the page . . .

Yet the Thunderbird chip is available with a core clock speed as high as 1 GHz and offers 256MB of L2 cache, whereas the Duron tops out at 700 MHz and uses only 64MB of L2 cache.

Augh! It gets worse . . .

The Celeron has used an integrated L2 cache since the 566- and 600-Mhz versions of the chip were introduced this spring, but its design diggers slightly from the Duron's. The Celeron's L2 cache (128MB is larger and uses a wider data path (256-bit) compared with the Duron's 64-bit data path. But the L1 cache is smaller 32MB and the chip's front side bus speed is slower (66 MHz).

The Celeron-2 features, I believe, a 128-bit L2 cache pathway; it's half of the L2 cache pathway of the Coppermine. That's actually the biggest error in the article. Not to mention the fact that Celeron has had integrated cache since the Celeron 300A.

All right, so obviously the writer is a moron. Does he work for Sharky Extreme? P3Zone? Nope.

PC Magazine! Argh! :|

I switched my subscription over from the piece of garbage that was PC Computing (now ZDNet's Smart Business for the New Millenium) hoping to find some decent info. Instead I find blatant editorial errors. Ah, well. Dvorak's columns are entertaining at least.

 

[Sephiroth_IX]

Everything in this article is perfectly correct.

 

[XMan]

Sure, Seph, I'd love to have a Thunderbird with 256 megabytes of L2 cache!

 

[Sephiroth_IX]

Do you want a screenshot of the WCPUID of the Tbird i am running as i post this? The Tbird has 256kb of L2 just as the P3 does.

 

[XMan]

Since when does 256MB = 256kb?

A T-bird has 256 kilobytes of L2 cache. The article states, incorrectly, that it has 256 megabytes, or 1,024 times 256 kilobytes.

 

[Argo]

I have actually read PC magazine say that celeron is faster than duron in Q3. They compare 700 duron with 666 celeron. Duron gets 19fps in q3, while celeron gets 28. Now this is the funniest part:

<<If you are a business user who barely plays game, then Duron is obviously good bang for the buck. Otherwise, celeron should be your choice.>>


ROFLMAO

 

[Sephiroth_IX]

I'm sorry Xerox... My sleep levels are far below average 🙁 LoL ill try and NOT be an ass next time i post 😛

 

[XMan]

That's the article, Argo. They call one open PCI slot &quot;ample room for expansion.&quot;

 

[Argo]

I told my dad to unsubscribe, and I belive he has already done so.

 

[WoundedWallet]

There was a time when I wouldn't think twice about collecting a lot of magazines in a computer show.

Now they suck so badly that all that I collect are the bags 😉

 

[Warrenton]

I wonder how much money could be made if someone actually made a mainstream magazine that wasn't full of bullsnot?

 

[Shockwave]

Huh...?? My tbird came with 256 meg of L2 cache.....Really......🙂

 

[Czar]

And from a magazine called PC Format. They called the VSA-100 chips the Voodoo5 5500 has a different name, for them its called ISA-100.

Stupid magazines.

 

[jinsonxu]

Where's the site, i gotta read some of it. This has got to be the most interesting thing i've heard all day, besides my lousy exam results that is.

 

[utopia]

LOL!!!! Die Xeon, die! i want one with 256MB!

 

[Pocatello]

What a bunch of idiots. You would wonder how the hell did they manage to a get a job writing about computer hardware.

 

[Spook]

Sign me up... Where do I get one of those... If I have 256Megs of L2 cache, do I even need Ram????

 

[Whitedog]

&quot;The Celeron-2 features, I believe, a 128-bit L2 cache pathway; it's half of the L2 cache pathway of the Coppermine. That's actually the biggest error in the article&quot;

That article is without a doubt the most pathetic attemp to summerize the newest CPU's I've read yet. However, the part about the 256-bit data path is actually correct.
Making assumptions yourself about specs and being &quot;wrong&quot; doesn't make them look any worse, or you any better 😉

If I may add, the copperon's (new celeron's based on the coppermine core) are nothing more than &quot;crippled&quot; PIII's. Yes, it's true. It is the exact same chip with &quot;half the L2 cache disabled&quot; and the bus speed locked to 66. The Duron however is a totally independant chip from the Thunderbird, being the L2 cache size on the dye is only 64k. This is the only difference. Nothing is disabled or bus speed difference.

To further comment on the Q3 bench marks, Q3 was coded to utilize SSE instruction sets which greatly increases 3D performance. Any game that takes advantage of SSE will score very well on Intel processors (hence the Celeron outscoring Duron), and as we know AMD doesn't have these instruction sets. Take a look at Q2 for example, Q2 did was not coded for SSE. This game was an even playing field for the Athlon and PIII being no chip had any advantage through software enhancements. Athlon Smokes PIII in this game.
The next generation of Processors, Willamette and Hammer (I forget exactly what kind of hammer. lol) will BOTH have what is being called SSE2 instruction sets...
This will end the trend of the advantage Intel has had with SIMD coded software. We'll finally get REAL benchmarks again. 😉

 

[Doctorweir]

lol, perhaps the russian ghost writer screwed some things up 😉

I'm satisfied with my Cel2 on a 0.00001 micron Die and 1GB fully integrated hexa-DR-first level cache 🙂))

 

[Ausm]

Must have been a real bitch putting on 256 MB on that CPU hehehe ..The Logistics are mind boggling

Ausm

🙂

 

[Vegito]

Boy would I like to have a lot of those 256mb caches...... wooohoo!