It sounds like TSMC is trying hard to compete against Intel......
http://www.electronicsweekly.com/bl...log/2011/11/arm-tsmc-moving-fast-to-20nm.html
Some interesting points from the above blog:
1. 20nm is one year away as a production technology. Does this mean we could see mobile cpus built on 20nm a good deal earlier than 1H 2014?
2. 20nm is expected to deliver 25% improvement in power efficiency, 15-20% improvement in performance, 1.9 increase in density.
3. 20nm Fully depleted SOI is being considered as an alternative to Intel 20nm Finfet. It will be interesting to see if this FDSOI process technology on 20nm would allow ARMv8 to make the cut for smartphones?
TSMC doesn't compete with Intel. Any attempts to draw correlations between the two are being done by "technology journalists" who simply may or may not even understand the industry itself.
Remember EETimes extolling that TSMC might beat Intel to 3D?
Report: TSMC may beat Intel to 3-D chips
Chip foundry giant Taiwan Semiconductor Manufacturing Co. (TSMC) could deliver its first semiconductors with 3-D interconnects by the end of 2011, potentially beating Intel Corp. to the punch in offering the first 3-D chips, according to a report circulated Tuesday (July 5) by a Taiwan trade group.
http://www.eetimes.com/electronics-news/4217553/Report--TSMC-may-beat-Intel-to-3-D-chips
To just about everyone in the industry, this "report" was a laughable work of fiction, and it seemed like even the technology journalists of EETimes had been hoodwinked by their own ignorance of the industry into thinking the two (TSMC and Intel) efforts had anything to do with one another.
Then two weeks later EETimes humbly printed their retraction:
Setting the record straight on the Intel-TSMC 3-D 'race'
Last week, a report by the Taiwan External Trade Development Council (TAITRA), a nonprofit organization promoting trade with Taiwanese firms, did just that, issuing a report that tantalizingly suggested that TSMC might beat Intel to the punch in bringing "three-dimensional chips" to market.
EE Times and other news organizations quickly seized on the report and
published stories based on it.
The problem, as many
EE Times readers promptly pointed out, is that the report was deeply flawed and based upon a false equivalency.
http://www.eetimes.com/electronics-...-record-straight-on-the-Intel-TSMC-3-D--race-
So be wary, very wary, of continued efforts to draw correlations between Intel and TSMC by those folks who make a living writing blogs and technology articles because they (1) need people to read their articles so they can make their mortgage payment, and (2) are writing about something that they themselves have likely not actually worked with hands-on...you are at risk of reading works of fiction and fantasy, even when liberally laced with quotes from industry workers.
The janitor at Intel knows just as much about Intel's 22nm xtors as the janitor at EETimes, but the one at Intel does have an Intel badge and can go on to say all kinds of stuff if they felt flattered to do so in an interview which then gets credited as "Intel employee's have said..." and so on.
Getting back to the article you cited. That particular alliance in France, what used to be referred to as the
Crolles alliance and
CEA-LETI is a rather minor league R&D consortia (dwindling to obscurity as they partner members have disbanded over time).
Even as far back as 90nm development they were very much a "following the pack" type outfit. No one in the industry looks to CEA-LETI for guidance on how the future of advanced CMOS is going to pan out, which is why you've probably never heard much of them before.
That's not a dig on them, for what they do they serve their purpose really well, but it is not surprising that they are putting out press releases that more or less attempt to legitimize their preferred path (not going 3D xtors anytime soon) because we've all seen it before.
GloFo and IBM did the same thing with HKMG when it first came out, downplayed it as an excuse for why they didn't have it when Intel did. Then we saw them do the same thing over gate-first versus gate-last. Now we are going to see the same PR notes recycled to argue for not going 3D at this time because "the benefits are minor until you get to smaller nodes".
Meanwhile, fast forward 3-4 yrs and you tell me if you'll be at ALL surprised at the possibility of you concluding "Intel, they knew what they were doing all along, including their transition to 3D xtors, and everyone else was just operating on hope and delusion".
TSMC knows what they are doing, and they are not competing with Intel. They are competing with GlobalFoundries and Samsung. Everyone else in the foundry business is really not a material concern for sub-32nm.