Now that NW is at 533fsb, what is the next fsb?

[MadRat]

Since the NorthWood made its jump to 533fsb (4x133fsb), how long until they move to 666fsb (4x166fsb)? Perhaps Intel will make smaller incremental changes, say to 600fsb (4x150fsb), then to say 640fsb (4x160fsb). Or maybe they'll expand the number of channels to 6-8 and go to 600fsb (6x100), 800fsb (8x100), 800fsb (6x133), or 1200fsb (8x133). I'm guessing they'll stay at 4 channels (4x133fsb) with main memory, but that they'll move back to an L3 cache to span the huge latencies of working with slow memory. With an L3 cache at 1GHz+ they could more easily ramp the CPU's fsb! Or maybe they'll use some new innovative way to figure an fsb...

What are your ideas about the Pentium-family's next FSB after 533fsb? ...and don't forget to say how you think they'll do it!

 

[Athlon4all]

If you look at Anand's final IDF article, he mentions that Prescott (next P4, with Hyper-Threading) will have a 200MHz QDR fsb (800MHz effective), and I doubt that Intel will be making any fsb increases before that. If there is, then the next step will most likely be 150MHz because that's the next RDRAM increase (PC1200 running at 600MHz DDR)

EDIT: Here's a link and a quote:

<< On the Intel side of things we completely forgot to mention one very important characteristic of Prescott yesterday. If you'll remember back to our BBUL technology article we gave a little preview of the FSB frequencies of future Intel processors - with Prescott coming in with an 800MHz FSB (presumably 200MHz quad-pumped). As far as other enhancements go, the move to a 0.09-micron manufacturing process will reduce the current Northwood die size by about half leaving quite a bit of room for additional architectural enhancements. Some theories we had included offering more cache (768KB or 1MB?) and maybe even moving to 32-bit ALUs instead of the current 16-bit units. The latter would make sense since Intel has been demonstrating high-speed 32-bit ALUs for quite a while now. >>

 

[MadRat]

I'd have to think a 800fsb (4x200fsb) would be unlikely considering the memory makers haven't caught up yet. With DDR2/333 around a year away is it plausible to release a DDR333 or DDR400 memory chipset for 200fsb/channel? We've seen how asynchronous memory offers some God-awful timing penalties. Surely they wouldn't start out asynchronous too, would they? Making the move to a 200fsb/channel and skipping 166fsb/channel would be a huge leap of faith, surely fraught with unnecessarily risky stumbling blocks. I just find it hard to believe they'd move with such a large leap. Incrementalism has been the name of the game for twenty years now...

 

[boyRacer]

600 then 667

 

[Athlon4all]

<< We've seen how asynchronous memory offers some God-awful timing penalties.Surely they wouldn't start out asynchronous too, would they? >>

True, but it's worked out fine because all DDR chipsets for the p4 before 533fsb are asynchorous and they manage in some cases to keep up with 850+PC800. Not to mention that 850 is a asynchorous chipset as well (PC800 runs at 400MHz DDR, while the fsb runs at 100MHz QDR). Truthfully, I predict that until DDR-2 (and that's not too clear either), there will be a lack of faster memory technologies for the p4 because of Intel ditching Rambus. As it is, 533fsb will never be maximized on anything but 850e and PC1066.

You are right, that would be quite a leap, but the whole asynchorous issue isn't as big IMHO as you're making it by comparing the P4's past.

 

[MadRat]

DDR memory is only okay in performance when operating far faster than the speed of any one channel on the P4's FSB. Current DDR266 is running 133fsb per channel compared to the Pentium 4's 100fsb per channel. The DDR266 memory doesn't really cut it at the new 133fsb per channel, whereas PC1066 is a good match. DDR333 is needed to match up to the 533fsb of third-generation P4's just to be on par.

DDR's latency is probably better than PC1066 RDRAM when you reach DDR333 performance, but by the time you factor in the Prescott's reported-200fsb per channel its way too slow for the job. PC1200 RDRAM (150fsb per channel) is just around the corner, but again the latency is going to be killer if its slower than synchronous speed of any one channel. We'd have to have PC1600 or DDR433 just to feed each channel of the 800fsb Prescott in any timely fashion.

I could see a 600fsb based off of 150fsb per channel because it would be fine with PC1200 and DDR333 memory technologies. But 800fsb based off of 200fsb per channel sounds pretty fanciful.

 

[Agent004]

Actually I hope Rambus goes further, as it's has so much more headroom than ddr currently.

 

[Athlon4all]

<< Actually I hope Rambus goes further, as it's has so much more headroom than ddr currently. >>

I do too. RDRAM really, has amazing potential and really, I think will always be the best memory type for the P4.