[NintendoLife]AMD in new Nintendo console?

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DustinBrowder

Member
Jul 22, 2015
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What?! Combined sales of the Xbox 360 and PS3 were only about 175 million. And that's not counting the people who owned both consoles and/or brought another 360 because of the RRoD problem.

The PS3 has sold a little over 90 million units (Sony's own numbers), with the Xbox360 selling about 85 million units. So that is pretty much 200 million units rounded up. That is basically what I said. You are like, no its wasn't exactly 200 million units, it was 199.8, its not 10.123, its 10.122. Seriously, give it a break!

I haven't seen any technical evidence that this is true. Its limited to 4 GiB per stack, but I have seen no literature which says there is a limit on the amount of stacks beyond the ability to make a sufficiently large interposer.

Fiji could only do 4 because Fiji is 600mm2, but that might not hold true for other products.

A single stack of HBM1 could be a very nice cache and could then take the transistor budget out of the eSRAM/eDRAM kind of caching. Probably not worth the interposer cost though.

Read any of the review articles of Fury X or Fury! Go read Anandtech or hexus or guru3d, etc... they all post that HBM1 is limited to 4gb and explain about the plans, they actually post the official pictures for future HMB plans that shows HBM2 being able to have 8GB memory!
 
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Despoiler

Golden Member
Nov 10, 2007
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The XB1 uses DDR3 memory, not GDDR5, and still has to use a rather expensive implementation of small but fast ESRAM to alleviate main memory bandwidth woes. Also, HBM isn't just one stack, it's currently four in the AMD Fury products, each providing 1024 bit data paths, each ~128 GB/s bandwidth, and 1 GB of VRAM. There is no rule that 4 stacks have to be used (AFAIK)

Expect HBM2 to at least double the memory density per chip at the same bandwidth next year, while offering the ability to stack more chips per stack.

Technically there is no HBM1 and HBM2 in the JEDEC spec. The only reason it exists is for SK Hynix to ramp up the technology faster. It's easier for them to make HBM1 with constrained operating parameters. You are correct that HBM1 is only limited by the number of vertical stacks. The total number of stacks on the interposer isn't limited. It would make the interposer more complex. It's currently being fabbed @ UMC @ 65nm to keep costs down.

I'm expecting Zen APUs to be interposer capable for 1 or 2 small stacks of HBM VRAM with the addition of a large DDR3/4 pool. It's completely reasonable that Nintendo might go with this approach to create a more PC-like memory environment, with ample VRAM and system memory, maybe 2 x 2GB stacks of HBM with 4 GB of 64 bit DDR3. The DDR3 could even be put on the interposer (might as well be fully HBM then). It would avoid the headaches of limited sizes of EDRAM/ESRAM, while offering large memory amounts and the same kind of bandwidths.

What I think it really comes down to is what AMD has in the works for Zen APUs. If they are to be HBM capable, it's all the more likely Nintendo will make use of that capability to have a supply chain and processor that is cheaper because of scale of production, since it's for PCs as well.

I'm not sure why people keep pushing the idea of a hybrid HBM + DDR setup. That resurrects huge negatives that HBM eliminated. Your GPU would have to have PHY for the HBM and have a memory controller for the DDR. HBM moved the logic slice into each HBM interposer stack thus saving GPU die area and complexity. HBM saves a lot of power by going wide and slow. You'd be going backwards by using DDR. Also, system memory is already your second slower pool for a GPU.

Edit:grammar
 

railven

Diamond Member
Mar 25, 2010
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The PS3 has sold a little over 90 million units (Sony's own numbers), with the Xbox360 selling about 85 million units. So that is pretty much 200 million units rounded up. That is basically what I said. You are like, no its wasn't exactly 200 million units, it was 199.8, its not 10.123, its 10.122. Seriously, give it a break!

You rounded up 25 million units. That's 33% of 360's sales or ~28% of PS3 sales. THAT is a huge round up. Haha.




I'll toss my hat into the Nintendo will not build a loss leader. Unless other parties was to sacrifice their margins to get their product into the next Nintendo Console. If Miyamoto takes over as president you can put another chip into an ARM design as Miyamoto has expressed his desire to tie their handheld and console titles together (as you see being done with the new Melee, and their push with Amiibos).

I don't recall Nintendo ever chasing the mainstream gamer. They've gone as far as refused titles on NES implementing rules such as "Quality over Quantity"
https://en.wikipedia.org/wiki/Ultra_Games
Ultra Software Corporation was a shell corporation and publishing label created in 1988 as a subsidiary of Konami of America, in an effort to get around Nintendo of America's strict licensing rules for the North American Konami release games for Nintendo consoles. One of these rules was that a third-party company could only publish up to five games per year for the Nintendo Entertainment System in the US.

I just don't see Nintendo rushing to join Sony/MSFT in a loss-leader race. They don't have the third party support. They also don't go around buying 3rd party support like both Sony/MSFT have done. Only select exclusives for Nintendo were due to developers approaching Nintendo to work with them, not the other way around (example Bayonetta 2 and Wonderful 101)

Whatever hardware Nintendo does use, expect it to be relatively cheap. Unlike it's rivals, Nintendo still firmly believes fun > graphics.
 
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monstercameron

Diamond Member
Feb 12, 2013
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Also note that hbm and interposer prices would go down as scale goes up. If amd is using it in all their next gen products along with nvidia and a possible Nintendo then I doubt prices would be an issue.
 

Headfoot

Diamond Member
Feb 28, 2008
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Read any of the review articles of Fury X or Fury! Go read Anandtech or hexus or guru3d, etc... they all post that HBM1 is limited to 4gb and explain about the plans, they actually post the official pictures for future HMB plans that shows HBM2 being able to have 8GB memory!

No.

You're wrong. Sorry bud.

Post me evidence where it says there is a limit FOR ALL ASICS to only have 4 stacks of HBM1. Hint: You can't find it because it doesn't exist. Fiji has 4 max because it has a 600mm2 die and the interposer is as big as can be built. Not every die is 600m2....
 

NTMBK

Lifer
Nov 14, 2011
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No.

You're wrong. Sorry bud.

Post me evidence where it says there is a limit FOR ALL ASICS to only have 4 stacks of HBM1. Hint: You can't find it because it doesn't exist. Fiji has 4 max because it has a 600mm2 die and the interposer is as big as can be built. Not every die is 600m2....

So what, you would pair a smaller die (which also has to cram in CPU cores, reducing the shader count further) with even more memory bandwidth than the Fury X? Which already struggles to utilize that much memory? Riiiight. And how much money will it cost to put this underpowered APU on a 600mm^2 interposer with >4 HBM stacks?
 

Madpacket

Platinum Member
Nov 15, 2005
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Technically there is no HBM1 and HBM2 in the JEDEC spec. The only reason it exists is for SK Hynix to ramp up the technology faster. It's easier for them to make HBM1 with constrained operating parameters. You are correct that HBM1 is only limited by the number of vertical stacks. The total number of stacks on the interposer isn't limited. It would make the interposer more complex. It's currently being fabbed @ UMC @ 65nm to keep costs down.



I'm not sure why people keep pushing the idea of a hybrid HBM + DDR setup. That resurrects huge negatives that HBM eliminated. Your GPU would have to have PHY for the HBM and have a memory controller for the DDR. HBM moved the logic slice into each HBM interposer stack thus saving GPU die area and complexity. HBM saves a lot of power by going wide and slow. You'd be going backwards by using DDR. Also, system memory is already your second slower pool for a GPU.

Edit:grammar

Nintendo traditionally doesn't take many risks with hardware. They use older IP / tech at discounted prices so they can profit off the console sales. That being said I'm guessing they will change course due to the failure of the Wii-U but they're still a conservative company.

For these reasons I doubt Nintendo will be going with a HBM design unless it's more cost efficient and yields are at acceptable levels, something that may be a reality if this thing launches in a few years but not if it's (rumoured) to release early next year.

I agree a hybrid solution with HBM doesn't make a ton of sense as it would just add too much cost / power usage.

Nintendo will likely take the safest most available and cheapest X86 hardware option that can still compete with Xbox One and PS4, to expect them to really put out anything better is wishful thinking.

High bandwidth low power DDR4 (my guess is 6-8GB if or when DDR4 hits peak production) attached to an APU with latest GCN tech + 4 low powered Carrizo cores would likely be more than enough to compete and still be cheaper to manufacture than the other systems.

If dual channel DDR4 isn't fast enough to feed the APU they can always integrate a triple core memory controller on the APU or go with a small amount (64-128 MB embedded eDRAM) but this is probably unnecessary and would add too much to the cost.

Remember Nintendo has a basic OS on the Wii U that runs on a custom ARM controller that requires only 512MB of system storage and 1GB of RAM. Compared to what Sony or MS offers, this would provide them a much smaller memory footprint unless they really plan on competing with them in media centre space as well (doubtful).

Anyway the Wii-U will likely be the last Nintendo console I buy. I never buy Nintendo consoles for the graphics, it was always about the core games. The new generation of gamers have no real attachments to these older franchises and the gamers who do have mostly moved on to PC gaming or Sony/Microsoft.

Now Nintendo cares more about selling stupid Amiibos to unlock parts of a full priced game where the content already resides on the disc (their version of DLC, although they're getting into that business as well).

Not getting myself or my kids into this trap ;)
 
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Headfoot

Diamond Member
Feb 28, 2008
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So what, you would pair a smaller die (which also has to cram in CPU cores, reducing the shader count further) with even more memory bandwidth than the Fury X? Which already struggles to utilize that much memory? Riiiight. And how much money will it cost to put this underpowered APU on a 600mm^2 interposer with >4 HBM stacks?

I never claimed that at all, and you know it. Obvious strawman is obvious. You can already see what I thought might be possible, and it wasn't that. Im not going to repeat myself.
 
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NTMBK

Lifer
Nov 14, 2011
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I never claimed that at all, and you know it. Obvious strawman is obvious. You can already see what I thought might be possible, and it wasn't that. Im not going to repeat myself.

No, I don't know that. Honestly, I thought that was what you were suggesting. :confused: What were you suggesting, if not that? (No, I'm not being sarcastic.)
 

swilli89

Golden Member
Mar 23, 2010
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Haha man this forum. Pretty amazing a new Nintendo console thread devolves into the same HBM capacity discussion that has been going on for about 4 months now.

Anyways.. Nintendo should just play it aggressive on specs(for Nintendo) while remaining conservative as far as reverting back to a classic controller config.

They could pretty much copy the PS4 internals and not lose money on its hardware sales. You guys have to realize that even though they are designing the specifications right now, they are planning on parameters they think will exist in mid to late 2016 if we are talking a holiday 2016 release. 14nm or 16nm or whatever will in fact be in full volume production by then. A SoC with ~1280 shaders on 14nm won't be very big at all.
 

RampantAndroid

Diamond Member
Jun 27, 2004
6,591
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Haha man this forum. Pretty amazing a new Nintendo console thread devolves into the same HBM capacity discussion that has been going on for about 4 months now.

Uh, ok? Someone suggested 4GB of HBM for the *system* - NOT just for the GPU, but the entire SYSTEM.
 

Headfoot

Diamond Member
Feb 28, 2008
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No, I don't know that. Honestly, I thought that was what you were suggesting. :confused: What were you suggesting, if not that? (No, I'm not being sarcastic.)

I could see a single stack used to replace eSRAM/eDRAM caching. But I'm not convinced they'll do it given the additional cost of the interposer unless they were to move more logic 2.5d stacked off the actual die, and Nintendo seems to prefer to build everything in a single SoC style die. My guess is probably no HBM, 1 or 2. I'd love to be surprised though
 

swilli89

Golden Member
Mar 23, 2010
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Uh, ok? Someone suggested 4GB of HBM for the *system* - NOT just for the GPU, but the entire SYSTEM.

It's nothing to get so excited about. Remember the Xbox One was spec'd for 4GB? They went to 8GB late in the game. 4GB would be feasible for a console targeting 1080p especially considering Nintendo's light operating system requirements.
 

DustinBrowder

Member
Jul 22, 2015
114
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No.

You're wrong. Sorry bud.

Post me evidence where it says there is a limit FOR ALL ASICS to only have 4 stacks of HBM1. Hint: You can't find it because it doesn't exist. Fiji has 4 max because it has a 600mm2 die and the interposer is as big as can be built. Not every die is 600m2....

DUDE go read the freaking articles. Just because you haven't read that the earth is round, doesn't mean its flat!

Whatever the technical issue is it means we won't be seeing 8GB HMB until 2017 for consumption!

Whether its because its more complex, whether its because of the implementation, whether its the stability, whatever, there is a limit and current HBM1 is limited to 4GB, get over it. The earth is not flat, just because you haven't read that its round, doesn't mean its flat!
 

Atreidin

Senior member
Mar 31, 2011
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From what I understand HBM1 stacks use 1024-bit bus. AMD is using a combined 4096 bit bus. Adding more stacks would just mean making the bus wider, so you could get 8GB by having a 8192-bit memory bus. Or am I missing something?
 

Elixer

Lifer
May 7, 2002
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There is virtually no chance of Nintendo using HBM, and still maintain a price point where people would buy it. (The 3DS didn't start selling well, until they dropped the price)
Nintendo will go with proven, low priced tech, the same as they have done in the past.

Though, it would be very interesting to see some kind of hybrid Carrizo using 1 or 2 stacks of HBM, integrated with a ARM CPU as well (To handle idle, security (ARM TrustZone), and other stuff like that).
 

Headfoot

Diamond Member
Feb 28, 2008
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there is a limit and current HBM1 is limited to 4GB, get over it.

No. It isn't. You're 100% wrong.

There is a 4 GiB PER STACK limit.

Unless you can point me to a source which says: "You can't use more than 4 Stacks" you're wrong.

Someone could make an ASIC with 6 stacks, 8, 12, however many they could fit on an interposer.

Whether they do or not is dependent on economics. Whether it's technically possible is what I'm talking about. And in that regard, there is absolutely no indication I've yet seen that it can't be done.
 
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Headfoot

Diamond Member
Feb 28, 2008
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From what I understand HBM1 stacks use 1024-bit bus. AMD is using a combined 4096 bit bus. Adding more stacks would just mean making the bus wider, so you could get 8GB by having a 8192-bit memory bus. Or am I missing something?

You're exactly right
 

NTMBK

Lifer
Nov 14, 2011
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I could see a single stack used to replace eSRAM/eDRAM caching. But I'm not convinced they'll do it given the additional cost of the interposer unless they were to move more logic 2.5d stacked off the actual die, and Nintendo seems to prefer to build everything in a single SoC style die. My guess is probably no HBM, 1 or 2. I'd love to be surprised though

Ah, okay, that makes much more sense! Thanks :)

But yeah, I would expect just DDR3/4 and on die ESRAM, like they have used in the past.
 

Sabrewings

Golden Member
Jun 27, 2015
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From what I understand HBM1 stacks use 1024-bit bus. AMD is using a combined 4096 bit bus. Adding more stacks would just mean making the bus wider, so you could get 8GB by having a 8192-bit memory bus. Or am I missing something?

You could, but you wouldn't have to for eight stacks. The HBM spec allows for up to 4 channels per die. It's up to the vendor. Fury X uses 2 channels per die resulting in eight channels giving you the 1024-bit bus per stack (128 bits per channel). You could easily use only 1 channel per die with eight stacks and still have the same 4096-bit wide memory bus resulting in easier interposer manufacturing. An 8 Kb memory bus is pretty uncalled for at this point.

Interestingly, you are also allowed up to eight die per stack per the JEDEC standard.
 
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Headfoot

Diamond Member
Feb 28, 2008
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Ah, okay, that makes much more sense! Thanks :)

But yeah, I would expect just DDR3/4 and on die ESRAM, like they have used in the past.

imo the wildcard is that I would expect AMD to be pushing HBM sales really hard in their semi-custom business unit. I'm sure every sales conversation between the two has an AMD guy going "and if you were on HBM you could do X Y and Z!"

Interestingly, you are also allowed up to eight die per stack per the JEDEC standard.

That's really interesting... As in you could theoretically have multiple different ASICs all sharing one stack of HBM?
 
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Sabrewings

Golden Member
Jun 27, 2015
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That's really interesting... As in you could theoretically have multiple different ASICs all sharing one stack of HBM?

Pretty easily, yes. If you want them to be able to absolutely pool the memory they would need to interface through a common memory controller. I'm not sure if the memory logic in the base of the stack (which is optional, BTW) is considered a full on memory controller. If not, they could just access their own channels on the stack, but they would limited to the bandwidth of 128 bits per channel they have access to. You simply can't have more than one controller accessing each channel.
 

HurleyBird

Platinum Member
Apr 22, 2003
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I wouldn't be surprised either way if Nintendo went with HBM or GDDR5. If the only consideration was performance, then I'd say HBM is unlikely. However, form factor is pretty important to Nintendo and HBM would give them more flexibility in that area as well.