New stepping of Ivy Bridge?

[ShintaiDK]

Thermal density. Say it loud! Repeat!

 

[brianftpc]

I wish they would hurry up and start using graphene in the cpu manufacturing process or in heat sinks...Im perfectly fine with paying a premium for it even though its cheaper than copper

 

[nsKb]

Not going to run much cooler even if they did that

Do you have any calculations or experimental data showing this?

 

[SickBeast]

Do you have any calculations or experimental data showing this?

Yes. They popped off the heat spreader and it had no effect on temps.

 

[Don Karnage]

Do you have any calculations or experimental data showing this?

The IHS isn't the issue. The size of the cores is

 

[nsKb]

Yes. They popped off the heat spreader and it had no effect on temps.

Do you have a link, this result is surprising.

The IHS isn't the issue. The size of the cores is

You need theory and experiment to back this up, you can't just insist. Ivy Bridge has many differences compared to Sandy; smaller die size; smaller and different transistors, solder replaced by TIM, and others. How do you know for certain that its not the IHS?

 

[BTRY B 529th FA BN]

Do you have a link, this result is surprising.



You need theory and experiment to back this up, you can't just insist. Ivy Bridge has many differences compared to Sandy; smaller die size; smaller and different transistors, solder replaced by TIM, and others. How do you know for certain that its not the IHS?

I've seen the article somewhere.

 

[Don Karnage]

Do you have a link, this result is surprising.



You need theory and experiment to back this up, you can't just insist. Ivy Bridge has many differences compared to Sandy; smaller die size; smaller and different transistors, solder replaced by TIM, and others. How do you know for certain that its not the IHS?

If the ihs was the issue the guys who pulled off the ihs and tested without it would have seen drastic temp change. What did they discover? No change.

 

[aaksheytalwar]

If the ihs was the issue the guys who pulled off the ihs and tested without it would have seen drastic temp change. What did they discover? No change.

+1

 

[Ferzerp]

If the ihs was the issue the guys who pulled off the ihs and tested without it would have seen drastic temp change. What did they discover? No change.

There was *one* random individual who posted that they did it and made no mention of altering their heat sink mounting to compensate. That same individual's anecdote got copied to 10 or 15 locations. It was never a good test. If you don't fix your mount after you do it to fit the new cpu thickness, you'll end up with worse temps.

 

[rge2]

If the ihs was the issue the guys who pulled off the ihs and tested without it would have seen drastic temp change. What did they discover? No change.

I would agree over half of the temp issue is the shrink in critical dimension, probably even 3/4. But the gradient across solder IHS at 100W (mod OCed ivy) is around 1C, per below white paper. The best non-soldered die attach is 5-9x worse than that, and will increase core temps easily 4-8C vs non solder tim at 100W, more as power increases. Though at stock settings, ~50W would only be 2-3C difference, which is likely why intel used it.

Here ( http://smithsonianchips.si.edu/ice/cd/PKG_BK/CHAPT_06.PDF ) is a white paper, figure 11 and 12, page 12, showing a 20W cpu, that paste tim has a gradient of 6C just across that paste tim interface. Substitute the solder c/w, and the gradient decreases to 0.2C across solder. That is 30X difference, however, they were using older paste, with worse resistance than available today.

It is indisputable, that solder 0.0098 c/w will have significantly cooler core temps, than current best paste/epoxy die interface with 5-9x higher resistance per companies that sell them.

As for test of removing the IHS and showing no better temps, to me that suggests solder tim is better.

When removing a soldered IHS, and doing direct die cooling fallwind on xtreme got 15C worse temps, his thread is still there, I have done same with waterblock on my E8400 when doing testing in Realtemp thread few years ago, and again much worse temps after removing soldered IHS.

The test you linked shows when removing the non-soldered die attach, temps did not go up, clearly showing that non-soldered die attaches are less effective than soldered ones. To me the no temp change clearly shows intels professionally baked (150C) voidless, thin bondline, non-solder die attach was superior to the user putting on Pk1 (with its inevitable air pockets since not baked on/thicker bondline, etc), which made removing a layer but using a poorer interface at tim1, a tie.

Problem is the belief that any time you remove a layer, you should get better temps. Try removing your heatsink and just blow air on IHS, since after all the heatsink and tim is just another layer, or does surface area matter.

The most important interface is tim1, since the die has very small surface area especially since relative hot spots (non-uniform temps).

Take a soldered IHS like E8400. Thermal conductance through die 125-150 W/mK >> solder tim 87 w/mk >> IHS 400 w/mk, now to a much larger more uniform area of heat before trying to cool relatively small areas with user tim 4-6 w/mk at best.

Which is why when remove solder IHS, and place user tim directly on die, temps go UP. Because now you are trying to cool small relative hot spots on die at very low thermal conductance.

 

[Ferzerp]

^^^

This, what I was too lazy to type and instead pointed out the flawed methodology in your anecdote.

 

[nsKb]

I would agree over half of the temp issue is the shrink in critical dimension, probably even 3/4. But the gradient across solder IHS at 100W (mod OCed ivy) is around 1C, per below white paper. The best non-soldered die attach is 5-9x worse than that, and will increase core temps easily 4-8C vs non solder tim at 100W, more as power increases. Though at stock settings, ~50W would only be 2-3C difference, which is likely why intel used it.

Here ( http://smithsonianchips.si.edu/ice/cd/PKG_BK/CHAPT_06.PDF ) is a white paper, figure 11 and 12, page 12, showing a 20W cpu, that paste tim has a gradient of 6C just across that paste tim interface. Substitute the solder c/w, and the gradient decreases to 0.2C across solder. That is 30X difference, however, they were using older paste, with worse resistance than available today.

It is indisputable, that solder 0.0098 c/w will have significantly cooler core temps, than current best paste/epoxy die interface with 5-9x higher resistance per companies that sell them.

As for test of removing the IHS and showing no better temps, to me that suggests solder tim is better.

When removing a soldered IHS, and doing direct die cooling fallwind on xtreme got 15C worse temps, his thread is still there, I have done same with waterblock on my E8400 when doing testing in Realtemp thread few years ago, and again much worse temps after removing soldered IHS.

The test you linked shows when removing the non-soldered die attach, temps did not go up, clearly showing that non-soldered die attaches are less effective than soldered ones. To me the no temp change clearly shows intels professionally baked (150C) voidless, thin bondline, non-solder die attach was superior to the user putting on Pk1 (with its inevitable air pockets since not baked on/thicker bondline, etc), which made removing a layer but using a poorer interface at tim1, a tie.

Problem is the belief that any time you remove a layer, you should get better temps. Try removing your heatsink and just blow air on IHS, since after all the heatsink and tim is just another layer, or does surface area matter.

The most important interface is tim1, since the die has very small surface area especially since relative hot spots (non-uniform temps).

Take a soldered IHS like E8400. Thermal conductance through die 125-150 W/mK >> solder tim 87 w/mk >> IHS 400 w/mk, now to a much larger more uniform area of heat before trying to cool relatively small areas with user tim 4-6 w/mk at best.

Which is why when remove solder IHS, and place user tim directly on die, temps go UP. Because now you are trying to cool small relative hot spots on die at very low thermal conductance.

Then my back of the envelope calculations were reasonably close. Thank you for posting this.

 

[2is]

If the ihs was the issue the guys who pulled off the ihs and tested without it would have seen drastic temp change. What did they discover? No change.

There are those who argue that the use of solder would have more efficiently transferred heat to the ihs which has a much larger surface area than the die, which would in turn result in more efficient heat transfer to the hsf even compared to a hsf directly on the die using tim.

I don't know how valid this theory is but it seems plausible to me.

 

[RampantAndroid]

There are those who argue that the use of solder would have more efficiently transferred heat to the ihs which has a much larger surface area than the die, which would in turn result in more efficient heat transfer to the hsf even compared to a hsf directly on the die using tim.

I don't know how valid this theory is but it seems plausible to me.

Do the Xigamatek coolers that have the heatpipes in direct contact with the IHS show any improved temps over other heatsinks? It would seem like they might do better?

 

[AtenRa]

Do the Xigamatek coolers that have the heatpipes in direct contact with the IHS show any improved temps over other heatsinks? It would seem like they might do better?

If you have an IHS then theoretically they will be better.
But if you remove the IHS, then because not all of the heat-pipes will be in contact with the small CPU die then they will perform worst than other coolers.

 

[Rvenger]

IB is not going to run cooler unless Intel decides to switch from thermal paste back to solder.

I hear it makes a minimal to no difference given the tests we have seen the past couple weeks. That is why Intel went the paste route instead of solder.

 

[n0x1ous]

Mine idles at 36C and loads at 62C @ 1.25 volts and 4.5GHZ on an H100 with NF-F12 fans. Turbo and all clock/multiplier/voltage reductions turned off so its running at 4.5/1.25V constantly.

 

[TaranScorp]

"rgallant
-ib is at E1 so new stepping are unlikely , but the tweaks in the process could tighten the large swings in voltage\heat per clock in the newer batches ,give it 2-3 weeks for the newest batches to hit the net."

Well both Microcenters are still out of stock so I guess I'll be buying from the next batch, hope your right.

 

[pm]

Nice post, rge2.

 

[aaksheytalwar]

In India ivy hasn't even reached the shelves anywhere

 

[RampantAndroid]

"rgallant
-ib is at E1 so new stepping are unlikely , but the tweaks in the process could tighten the large swings in voltage\heat per clock in the newer batches ,give it 2-3 weeks for the newest batches to hit the net."

Well both Microcenters are still out of stock so I guess I'll be buying from the next batch, hope your right.

I seriously doubt this. What we have now is the best we're going to get I think. If intel made it to an E1 stepping before they shipped, don't you think they have the lithography figured out already?

 

[rgallant]

I'm still waiting until I have the time to rebuild this system and pick up to latest ib batch I can find in a brick and mortar store. first week in June maybe with a V formula.

 

[2is]

Do the Xigamatek coolers that have the heatpipes in direct contact with the IHS show any improved temps over other heatsinks? It would seem like they might do better?

I've used a Hyper 212 Evo and a TPC 812 on my 3770k. The 212 having direct contact with the heat pipes. Temps were identical. That said, the TPC 812 is a much higher end heatsink. 6 heat pipes vs 4, and vapor chambers in addition to it being physically larger. I was thinking about putting the 212 back in and returning the 812 but it's a PITA to get back in the case and swap and I kind of like how the 812 looks in there so I suppose I'll keep it even though that's an extra $70 for what only ended up being an improvement in aesthetics.

 

[technogiant]

If there is going to be a problem with thermal density then a layer of graphene contacting the chip and heat spreader cap would do the job....it has incredibly high thermal conductivity along its planes and would very effectively distribute heat to a larger surface area of metal.