New Budget Dual Core Celerons

[21stHermit]

According to this X-bit Labs Article Intel will have E1xxx, Celeron Dual Cores for $35 - $50.

While I'm sure they'll OC as well as the E2xxx dual cores, one has to wonder if it makes sense on a $100 MB.

Hermit

 

[ArchAngel777]

Interesting... I agree, it does not make a lot of sense to use a $50 CPU on a $100 motherboard. It appears these will be outperformed by the X2, clock for clock.

 

[piasabird]

This article says Dual Core Celerons, it does not say Core 2 Duo Celerons. I still have a Tulatin Core Celeron and it is still running great. I wonder if Intel will come out with the dual core Celeron M models first for laptops first.

 

[21stHermit]

Originally posted by: piasabird
This article says Dual Core Celerons, it does not say Core 2 Duo Celerons.

That's just namesmenship, from everything I've read the E2xxx Pentium Dual Core and the E4xxx Core 2 Duo are identical CPU cores with different FSB's and cache amounts. My take on the E1xxx Celeron Dual Core is more of the same, or in this case less.

I care not what Intel calls the critter, only how well it's Price/Performance stacks up. In current Intel speak we have:
Celeron < Pentium < Core 2 Duo < Core 2 Quad < Core 2 Extreme.

Its all about Price/Performance and getting the consumer to buy Intel, not AMD.

 

[nyker96]

lovely now I might just get one for my mother's web browsing machine.

 

[21stHermit]

Originally posted by: jjmIII

To me a bigger issue is, does it make sense to put a $35 CPU on a $100 MB...

Sure. Why not??

Might have to grab one just to OC to the edge :evil:.

Your second comment is the answer, to you this is a game with no economic reality. It matters not what any component/system costs, only how far you can push the envelope. That end justifies all expenses.

From my point of view, one builds a balanced system getting the maxmum performance at the minimum price. When one considers all the needed parts, a CPU that cost less than a PSU makes no sense. I'd love to see that $35 Celeron in a $200 turn-key system.

Just a difference of perspective.

Hermit

 

[VirtualLarry]

Imagine something like this, only with a dual-core C2D chip inside. That would rock.

I can imagine that the lesser amount of L2 cache would allow them to set a lower power margin for the CPU. The Celeron 440 already takes an obscenely small amount of power to run. A dual-core variant shouldn't be much worse.

 

[Falloutboy]

what we really need are some budget barebone MBs for these chips. something in the 50-75 dollar range that we always seemed to have for amd boards for when they were hot

 

[coldpower27]

Originally posted by: Falloutboy
what we really need are some budget barebone MBs for these chips. something in the 50-75 dollar range that we always seemed to have for amd boards for when they were hot

http://www.newegg.com/Product/...x?Item=N82E16813128062

The P31 chipsets support a 333MHZ FSB so overclocking from 200MHZ allows 66% headroom minimum. So that's like 2.66GHZ from 1.6GHZ which wouldn't be too bad, as Intel releases better Celeron E1xxx models this will get easier.

 

[21stHermit]

Originally posted by: VirtualLarry
Imagine something like this, only with a dual-core C2D chip inside. That would rock.

I agree, MB, CPU and video for $70.

How we need it in a VESA form factor, mount it to the back of a nice widescreen LCD.

 

[Zap]

Originally posted by: coldpower27
The P31 chipsets support a 333MHZ FSB so overclocking from 200MHZ allows 66% headroom minimum. So that's like 2.66GHZ from 1.6GHZ which wouldn't be too bad, as Intel releases better Celeron E1xxx models this will get easier.

Some 945G chipset boards can do this (unofficially). There's an Asrock board, model ConRoe1333-667 or something like that, which runs $60 and can run FSB1333.

 

[Bateluer]

These upcoming chips are most likely the C2Ds that failed at being E6xxx's, E4xxxs, and E2xxx's for various reasons. The cache and FSB will be cut down some more to get them to pass validation, then they can make up some of the cost of manufacturing. Every semiconductor company with more than one sku has done this.

 

[21stHermit]

Originally posted by: Bateluer
These upcoming chips are most likely the C2Ds that failed at being E6xxx's, E4xxxs, and E2xxx's for various reasons.

Nonsense!!!

In order to lower the manufacturing cost, you reduce the die size allowing more dies per wafer. Since the core can't change, the cache is reduced to decrease the die size. As we have seen with the pin mod, the FSB is two pins shorted.

I'll grant that your logic is valid for AMD's triple core, to improve the yield of Quads, in the case of Intel, they have their process and yield under better control to resort to binning.

 

[RaptureMe]

well I already have a celeron D336 2.8 on a p965 MATX gigabyte board that I got for like 25 bucks as a backup slash backup to my other systems.
Its just sitting in my closet in the factory box that my MATX case came in collecting dust!!
I dont know maybe I will grab one of these 65nm celeron dualies to retire my older style celeron if they are cheap enough and turn my backup of a backup pc into a HTPC??
I wonder how these will run HD-DVD's or Blu-Ray movies or wont they be strong enough??
Or for that matter if cheap enough I could make a little server farm all though I dont know what the heck I would use it for.
Perhaps I will join a folding club or something.

 

[nyker96]

Originally posted by: 21stHermit

Originally posted by: Bateluer
These upcoming chips are most likely the C2Ds that failed at being E6xxx's, E4xxxs, and E2xxx's for various reasons.

Nonsense!!!

In order to lower the manufacturing cost, you reduce the die size allowing more dies per wafer. Since the core can't change, the cache is reduced to decrease the die size. As we have seen with the pin mod, the FSB is two pins shorted.

I'll grant that your logic is valid for AMD's triple core, to improve the yield of Quads, in the case of Intel, they have their process and yield under better control to resort to binning.

that's possible, rebin those failed ones to lower grade like AMD X3, is a way to save cost.

 

[Bateluer]

Originally posted by: 21stHermit

Originally posted by: Bateluer
These upcoming chips are most likely the C2Ds that failed at being E6xxx's, E4xxxs, and E2xxx's for various reasons.

Nonsense!!!

In order to lower the manufacturing cost, you reduce the die size allowing more dies per wafer. Since the core can't change, the cache is reduced to decrease the die size. As we have seen with the pin mod, the FSB is two pins shorted.

I'll grant that your logic is valid for AMD's triple core, to improve the yield of Quads, in the case of Intel, they have their process and yield under better control to resort to binning.

Intel has done this in the past as well, likely still are. It doesn't help them save money per se, rather it helps reduce their loss. Otherwise they'd have stacks of CPUs that they would otherwise be unable to sell.

ATI and NV have done this as well. The 6800 vanillas were GT/Ultras that had potentially faulty pipelines. In some cases, some pipelines could be turned back on, Rivatuner could do this.

 

[jjmIII]

Originally posted by: jjmIII

To me a bigger issue is, does it make sense to put a $35 CPU on a $100 MB...

Sure. Why not??

The mobo should cost around $100. Plus, you can get one under $100.
You do know more than just the cpu plugs into the mobo??

Might have to grab one just to OC to the edge :evil:.

At least give me a full quote , and not your shortened version .

 

[VirtualLarry]

Originally posted by: 21stHermit

Originally posted by: Bateluer
These upcoming chips are most likely the C2Ds that failed at being E6xxx's, E4xxxs, and E2xxx's for various reasons.

Nonsense!!!

In order to lower the manufacturing cost, you reduce the die size allowing more dies per wafer. Since the core can't change, the cache is reduced to decrease the die size. As we have seen with the pin mod, the FSB is two pins shorted.

I'll grant that your logic is valid for AMD's triple core, to improve the yield of Quads, in the case of Intel, they have their process and yield under better control to resort to binning.

I hate to say it, but he's probably right. Intel probably had a lot of cores that passed validation for the logic units, but had varying issues with the cache being bad. So why not release some C2D dual-core units with 512KB cache. Same sort of reason why AMD is going to release triple-core CPUs in the future, they are quad-cores with one bad core.