Which bridges are not working right? The system fails to boot when I choose multipliers lower than 11.0
Need help with unlocking. XP 2000+ unlocked only partially. Can't use multiplier lower than 11.0.
- Thread starter Parn
- Start date
This is speculative to a degree, but might be possible that you cross-connected the 4X and 8X Bit Value L1 bridges. If so then at 10.5X when the bios resets the 4X BV to HI (from LO where it's been from 12.5X thru 11X) that might also reset the 8X BV from LO to HI which would then be calling for 18.5X!!!! Here's the scenario...
L1s from L to R = .5X-1X-2X-4X-8X Bit Values Enabled when HI.
12.5X = H-H-L-L-L
12.0X = L-H-L-L-L
11.5x = H-L-L-L-L
11.0X = L-L-L-L-L
10.5X = H-H-H-H-L
18.5X = H-H-H-H-H @ 10.5X IF 4X and 8X were cross-connected???
Check out our Understanding Multiplier Code article at
http://www.beachlink.co/candjac/index.htm Also believe 18.5X is "Reserved". Send us an email if we're right.
John C.
I don't know if this will make a difference, but multipliers lower than 10.5 doesn't work either. I've tried from 10.5 to 8.0.
8X doesn't make any difference.....
*8.0X = L-H-L-H-L, so if 8X gets turned on HI by X-connection to 4X
16.0X = L-H-L-H-H, which we would also not expect to boot, and similarly trying 7X would get 15X if 4X was X-connected to 8X, which also we'd not expect to post...right???
So we have to go down to 6.5X as highest Multi with 4X =LO, which would "assure" that 8X, normally default LO, would indeed be LO even if X-connected to 4X....see L to R code below.
6.5X = H-H-H-L-L
So if 6.5X boots at 6.5X then our speculation might still be alive...right...Give it a try.
And as for the link, .com instead of .co, sorry about that.
John C.
Forgot to remind you to read the Multiplier Code article. All the L-Hs become very clear when you "understand" AMD's multiplier Code.
Also read others as you see fit.
http://www.beachlink.com/candjac/index.htm
John C.
Also read others as you see fit.
http://www.beachlink.com/candjac/index.htm
John C.
This is what i get when I try to open that URL
I tried to open http://www.beachlink.com/candjac/index.htm
I tried to open http://www.beachlink.com/candjac/index.htm
Yes, 6.5X not booting does seem to shoot down the 4th and 5th L1 X-connection speculation. Will try to think up another scenario after
return from dentist..in meantime try link again, worked for us just now.
John C.
return from dentist..in meantime try link again, worked for us just now.
John C.
Ok, I read the thing.
Here is what I found out. My CPU now only runs at 11.5 or 11.0 multiplier. anything lower will make it stop booting. Multiplier of 12.0 will just boot as 11.0. So my guess from this, is that only the .5x and 8x bridges are working correctly.
But why would it boot as 11.0 when I specify 12.0, and 11.5 when I specify 12.5?
Here is what I found out. My CPU now only runs at 11.5 or 11.0 multiplier. anything lower will make it stop booting. Multiplier of 12.0 will just boot as 11.0. So my guess from this, is that only the .5x and 8x bridges are working correctly.
But why would it boot as 11.0 when I specify 12.0, and 11.5 when I specify 12.5?
You wrote....Ok, I read the thing.
Here is what I found out. My CPU now only runs at 11.5 or 11.0
multiplier. anything lower will make it stop booting. Multiplier of 12.0 will just boot as 11.0.
So my guess from this, is that only the .5x and 8x bridges are
working correctly.
But why would it boot as 11.0 when I specify 12.0, and 11.5 when
I specify 12.5? End quote....
Response to last sentence....
L to R L1 bridges connect to .5X-1X-2X-4X-8X Bit Values/circuits,
L = LO, H = HI.
****Default = 12.5X = H-H-L-L-L
Set 12.5X, get 11.5X = H-L-L-L-L
Deviation is in the 2nd circuit/1X BV, it's LO when called by bios to be HI...right?? So possible that 2nd L1 bridge was accidentally grounded during the L1 closing operation...and so bios will not be able to reset it HI.
**********12X = L-H-L-L-L
Set 12X, get 11X = L-L-L-L-L
Same deviation as above, "confirms" 2nd L1 grounded. But .5X did reset from default HI to LO so its L1 is closed correcly. OK, .5X and 1X L1s explained, one OK, one grounded, 3 left, the 2X/4X/8X L1s. Btw, this agrees with your decoding that .5X L1 = OK, but 1X L1 has a problem...right???
10.5X = H-H-H-H-L = No boot, but established above that L1 might be grounded, so will probably always be LO.
So 10.5X with 1X grounded LO = H-L-H-H-L, should get 9.5X, but get "no boot". Again only way we see "no boot" with respect to "Multiplier Code", is that 4X could be X-connectedto 8X, pulling 8X HI for a H-L-H-H-H setting which is code for 17.5X, which is Remapped to 18X, no way CPU will run at 18X.
If we try to say that either or both of 2X and 4X circuits are somehow pulled LO along with 8X LO, we still get settings that should boot, like 11.5X or 5.5X or 7.5X. So 4X and 8X being X-connected is the only way an "L1 bridges problem" should be able to generate a "no boot". If not L1s, then problem has to be somewhere else in the system, like mobo/bios.
But 6.5X also did not boot.
6.5X = H-H-H-L-L, but with 1X L1 grounded,
6.5X = H-L-H-L-L, should get 5.5X. And on overnight reconsideration/decoding the Multiplier, suppose that all 3,
2X, 4X, and 8X L1s were X-connected. Then 6.5X final setting
might = H-L-H-H-H, same 17.5X above...and same "no boot".
And again, if not L1s, then somewhere else.
We know this sounds unlikely, a very poor L1s closing operation, but we just can't come up with any other explanations with respect to possible faults in closing the L1 bridges. And now that you know the Multiplier Code you're able to check the above, or correct above conclusion/s.
So the only suggestion would be to take out the CPU, inspect it for the above faults re the 1X, and 2X/4X/8X L1s. The 1X L1 ground might be to the sub-surface ground plane in its "pit". The other X-connection fault should be visible on the surface. Clean them up even if you can't see them esp the 1X L1, and redo them. Then if you have the same problem, it will most likely have to be somewhere other than the L1s.
John C.
PS:- You are insulating the L1 "pits" before closing with conductive medium???
Here is what I found out. My CPU now only runs at 11.5 or 11.0
multiplier. anything lower will make it stop booting. Multiplier of 12.0 will just boot as 11.0.
So my guess from this, is that only the .5x and 8x bridges are
working correctly.
But why would it boot as 11.0 when I specify 12.0, and 11.5 when
I specify 12.5? End quote....
Response to last sentence....
L to R L1 bridges connect to .5X-1X-2X-4X-8X Bit Values/circuits,
L = LO, H = HI.
****Default = 12.5X = H-H-L-L-L
Set 12.5X, get 11.5X = H-L-L-L-L
Deviation is in the 2nd circuit/1X BV, it's LO when called by bios to be HI...right?? So possible that 2nd L1 bridge was accidentally grounded during the L1 closing operation...and so bios will not be able to reset it HI.
**********12X = L-H-L-L-L
Set 12X, get 11X = L-L-L-L-L
Same deviation as above, "confirms" 2nd L1 grounded. But .5X did reset from default HI to LO so its L1 is closed correcly. OK, .5X and 1X L1s explained, one OK, one grounded, 3 left, the 2X/4X/8X L1s. Btw, this agrees with your decoding that .5X L1 = OK, but 1X L1 has a problem...right???
10.5X = H-H-H-H-L = No boot, but established above that L1 might be grounded, so will probably always be LO.
So 10.5X with 1X grounded LO = H-L-H-H-L, should get 9.5X, but get "no boot". Again only way we see "no boot" with respect to "Multiplier Code", is that 4X could be X-connectedto 8X, pulling 8X HI for a H-L-H-H-H setting which is code for 17.5X, which is Remapped to 18X, no way CPU will run at 18X.
If we try to say that either or both of 2X and 4X circuits are somehow pulled LO along with 8X LO, we still get settings that should boot, like 11.5X or 5.5X or 7.5X. So 4X and 8X being X-connected is the only way an "L1 bridges problem" should be able to generate a "no boot". If not L1s, then problem has to be somewhere else in the system, like mobo/bios.
But 6.5X also did not boot.
6.5X = H-H-H-L-L, but with 1X L1 grounded,
6.5X = H-L-H-L-L, should get 5.5X. And on overnight reconsideration/decoding the Multiplier, suppose that all 3,
2X, 4X, and 8X L1s were X-connected. Then 6.5X final setting
might = H-L-H-H-H, same 17.5X above...and same "no boot".
And again, if not L1s, then somewhere else.
We know this sounds unlikely, a very poor L1s closing operation, but we just can't come up with any other explanations with respect to possible faults in closing the L1 bridges. And now that you know the Multiplier Code you're able to check the above, or correct above conclusion/s.
So the only suggestion would be to take out the CPU, inspect it for the above faults re the 1X, and 2X/4X/8X L1s. The 1X L1 ground might be to the sub-surface ground plane in its "pit". The other X-connection fault should be visible on the surface. Clean them up even if you can't see them esp the 1X L1, and redo them. Then if you have the same problem, it will most likely have to be somewhere other than the L1s.
John C.
PS:- You are insulating the L1 "pits" before closing with conductive medium???
Yes, I have filled the gaps with super glue.
Let's say the L1 bridge gaps were poorly insulated. Could I possibly insulate over what may be grounded, to apply conductive paint over that? I would think yes...
I guess I can try really hard to clean the cpu out and try again
5th try, here we come haha.
Thanks for all your help btw. I will try once again.
Let's say the L1 bridge gaps were poorly insulated. Could I possibly insulate over what may be grounded, to apply conductive paint over that? I would think yes...
I guess I can try really hard to clean the cpu out and try again
5th try, here we come haha.
Thanks for all your help btw. I will try once again.
Originally posted by: Parn
Yes, I have filled the gaps with super glue.
Let's say the L1 bridge gaps were poorly insulated. Could I possibly insulate over what may be grounded, to apply conductive paint over that? I would think yes...
I guess I can try really hard to clean the cpu out and try again
5th try, here we come haha.
Thanks for all your help btw. I will try once again.
Re insulating over what may be grounded...we would think no...
suggest to clean out all the stuff in the 1X pit...qtip saturated with acetone???
Welcome with the help, our best reward is your "understanding" the Multiplier Code to come up with the .5X = OK, 1X = NG. Now you won't need help in the future...the world is a better place.;-)
John C.
I redid the insulation after trying to clean up whatever I can from the bridge gaps. Some of them looked like it had some conductive paint in it (surprisingly, the .5x L1 bridge gap had the paint in it too).
This time I made triple sure that the glue was covering the gap before doing the paint.
It's still not working completely.
So far, here's what I found.
The following works:
12.5x = H-H-L-L-L
12.0x = L-H-L-L-L
10.5x = H-H-H-H-L
10.0x = L-H-H-H-L
This already probably means that 0.5x to 4x bridges are working correctly.
Now, here's where I get confused.
11.5x = H-L-L-L-L
11.0x = L-L-L-L-L
9.5x = H-L-H-H-L
9.0x = L-L-H-H-L
13.0x = L-L-H-L-L
These all result as a "no-boot". If grounding results in a permanent "Low" state, when would a 11.0x multiplier ever not work?
For fuctional purposes, I am running at 166mhz x 10.0 = 1660MHz, which is what I wanted to try. I will run prime95 overnight with it tonight. But on a "completeness" purpose of my unlocking, what's going on here?
This time I made triple sure that the glue was covering the gap before doing the paint.
It's still not working completely.
So far, here's what I found.
The following works:
12.5x = H-H-L-L-L
12.0x = L-H-L-L-L
10.5x = H-H-H-H-L
10.0x = L-H-H-H-L
This already probably means that 0.5x to 4x bridges are working correctly.
Now, here's where I get confused.
11.5x = H-L-L-L-L
11.0x = L-L-L-L-L
9.5x = H-L-H-H-L
9.0x = L-L-H-H-L
13.0x = L-L-H-L-L
These all result as a "no-boot". If grounding results in a permanent "Low" state, when would a 11.0x multiplier ever not work?
For fuctional purposes, I am running at 166mhz x 10.0 = 1660MHz, which is what I wanted to try. I will run prime95 overnight with it tonight. But on a "completeness" purpose of my unlocking, what's going on here?
You wrote...
I redid the insulation after trying to clean up whatever I can from the bridge gaps. Some of them looked like it had some conductive paint in it (surprisingly, the .5x L1 bridge gap had the paint in it too).
**Generally confirms what we suspected, faults in closing L1s, right??
So far, here's what I found. The following works:
12.5x = H-H-L-L-L
12.0x = L-H-L-L-L
10.5x = H-H-H-H-L
10.0x = L-H-H-H-L
This already probably means that 0.5x to 4x bridges are working correctly.
**No, "proves" that "only" the .5X, 2X, and 4X L1 bridges have been closed "correctly without any faults...grounding or still open".
Only those because those are the only ones in the pattern above which "changed state"...LO to HI, or HI to LO. That cannot be done IF the respective L1 bridge is either "open or grounded"...right??
But does not "prove" that 1X and 8X L1s "have faults", because for the settings above 1X and 8X Bit Values are "not supposed to change" from default HI.
Now, here's where I get confused.
11.5x = H-L-L-L-L
11.0x = L-L-L-L-L
9.5x = H-L-H-H-L
9.0x = L-L-H-H-L
13.0x = L-L-H-L-L
These all result as a "no-boot". If grounding results in a permanent "Low" state, when would a 11.0x multiplier ever not work?
**When 1 or more are still HI, "all 5" have to be LO for 11X.
**Now let's examine the above "no boot" Multipliers. You've shown the HI/LO patterns that "should exist". Note that for all of them the 1X BV should be LO, but default 12.5X has 1X = HI, (see 1st pattern), and the 1st/successful Multipliers which needed 1X to be HI prove that it "was" HI, and if it "was" HI, then it was "not grounded". So why did it not change to LO as needed in the 2nd set?? Maybe because its L1 bridge is still "open" and with an open L1 the bios can't reset it to LO.
**But this only explains why you didn't "get what you set", it doesn't explain "no boot". With 1X L1 still open and default HI, you should have gotten 1X "more" than you set...right??...like 9X should have booted at 10X. (PS:-13X should have 8X BV = HI).
**So the only thing we can think of is that the open 1X L1 might be causing a "mismatch "between" the actual Multiplier setting, the Multiplier "ID' setting which gets sent to the Northbridge thru a different set of pins, and maybe the setting the bios "thinks" it's setting. Some may or may not be affected by an open L1.
This is pure speculation, but we know that in older Tbirds, if the Multiplier L3/L4 bridges were set higher than the Multiplier "ID" L6 bridges, then at least some systems would not boot...originally of course AMD set "both " to the same Multiplier. Has to to do with the Northbridge setting system data/timings/?wait states?...so probably if info wrong then timings wrong then no boot. All CPU datsheets talk about this, key words = SIP, Serial Information Protocol, FID.
**So with only 1 "speculation" (but based on older Tbird experience), we think all the dots might be connected.
For fuctional purposes, I am running at 166mhz x 10.0 = 1660MHz, which is what I wanted to try. I will run prime95 overnight with it tonight. But on a "completeness" purpose of my unlocking, what's going on here?
**Hope we've clarified, even though the "no boot" explanation is somewhat of a "stretch", even for us. But the evidence for the 1X L1 still being open is strong.
John C.
I redid the insulation after trying to clean up whatever I can from the bridge gaps. Some of them looked like it had some conductive paint in it (surprisingly, the .5x L1 bridge gap had the paint in it too).
**Generally confirms what we suspected, faults in closing L1s, right??
So far, here's what I found. The following works:
12.5x = H-H-L-L-L
12.0x = L-H-L-L-L
10.5x = H-H-H-H-L
10.0x = L-H-H-H-L
This already probably means that 0.5x to 4x bridges are working correctly.
**No, "proves" that "only" the .5X, 2X, and 4X L1 bridges have been closed "correctly without any faults...grounding or still open".
Only those because those are the only ones in the pattern above which "changed state"...LO to HI, or HI to LO. That cannot be done IF the respective L1 bridge is either "open or grounded"...right??
But does not "prove" that 1X and 8X L1s "have faults", because for the settings above 1X and 8X Bit Values are "not supposed to change" from default HI.
Now, here's where I get confused.
11.5x = H-L-L-L-L
11.0x = L-L-L-L-L
9.5x = H-L-H-H-L
9.0x = L-L-H-H-L
13.0x = L-L-H-L-L
These all result as a "no-boot". If grounding results in a permanent "Low" state, when would a 11.0x multiplier ever not work?
**When 1 or more are still HI, "all 5" have to be LO for 11X.
**Now let's examine the above "no boot" Multipliers. You've shown the HI/LO patterns that "should exist". Note that for all of them the 1X BV should be LO, but default 12.5X has 1X = HI, (see 1st pattern), and the 1st/successful Multipliers which needed 1X to be HI prove that it "was" HI, and if it "was" HI, then it was "not grounded". So why did it not change to LO as needed in the 2nd set?? Maybe because its L1 bridge is still "open" and with an open L1 the bios can't reset it to LO.
**But this only explains why you didn't "get what you set", it doesn't explain "no boot". With 1X L1 still open and default HI, you should have gotten 1X "more" than you set...right??...like 9X should have booted at 10X. (PS:-13X should have 8X BV = HI).
**So the only thing we can think of is that the open 1X L1 might be causing a "mismatch "between" the actual Multiplier setting, the Multiplier "ID' setting which gets sent to the Northbridge thru a different set of pins, and maybe the setting the bios "thinks" it's setting. Some may or may not be affected by an open L1.
This is pure speculation, but we know that in older Tbirds, if the Multiplier L3/L4 bridges were set higher than the Multiplier "ID" L6 bridges, then at least some systems would not boot...originally of course AMD set "both " to the same Multiplier. Has to to do with the Northbridge setting system data/timings/?wait states?...so probably if info wrong then timings wrong then no boot. All CPU datsheets talk about this, key words = SIP, Serial Information Protocol, FID.
**So with only 1 "speculation" (but based on older Tbird experience), we think all the dots might be connected.
For fuctional purposes, I am running at 166mhz x 10.0 = 1660MHz, which is what I wanted to try. I will run prime95 overnight with it tonight. But on a "completeness" purpose of my unlocking, what's going on here?
**Hope we've clarified, even though the "no boot" explanation is somewhat of a "stretch", even for us. But the evidence for the 1X L1 still being open is strong.
John C.
Previous post we wrote...
But does not "prove" that 1X and 8X L1s "have faults", because for the settings above 1X and 8X Bit Values are "not supposed to change" from default HI.
Should be.....
But does not "prove" that 1X and 8X L1s "have faults", because for the settings above 1X and 8X Bit Values are "not supposed to change" from default HI and default LO respectively.
John C.
But does not "prove" that 1X and 8X L1s "have faults", because for the settings above 1X and 8X Bit Values are "not supposed to change" from default HI.
Should be.....
But does not "prove" that 1X and 8X L1s "have faults", because for the settings above 1X and 8X Bit Values are "not supposed to change" from default HI and default LO respectively.
John C.
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