Need help identifying Core of AMD 64

[nshariff22]

Hi

Does anyone know how to identify a core( or build) of AMD 64 processor (eg. Venice, Toledo etc..) , as I have read of different cores, and retailers here know nothing of this. And some cores are better than the other. And how does one figure this out the core from the retail box, without having to install it.

And any suggestion for A64 3500+ , which core of that clock speed is good.


Thanks
:roll:

 

[Zebo]

When looking at part number look fro process code here in bold

For example on a 3200
ADA3200BPBOX

BP/BW- means Venice
AS-means clawhammer
BI - mean winchester


There are many others

You want - ADA3500BPBOX a e4 venice, or a ADA3500BWBOX the newest core revision of the 3500 E6 also a venice.

http://www.ewiz.com/detail.php?p=A64-35BWBX&c=pw

 

[nshariff22]

Thanks Zebo
Really appreciate that, I have heard of names like Newcastle, San Diego ....any many more, where do they fit in , is there any article which explains what all this core thing going one.:shocked:

Why can't AMD have single type of CPU. Make life a lot simpler ..and easier to buy

Thanks again
:thumbsup:

 

[Zebo]

Check my edit I made a correction after looking here
http://www.amdcompare.com/us-en/desktop/

 

[Zebo]

Originally posted by: nshariff22


Thanks Zebo
Really appreciate that, I have heard of names like Newcastle, San Diego ....any many more, where do they fit in , is there any article which explains what all this core thing going one.:shocked:

Why can't AMD have single type of CPU. Make life a lot simpler ..and easier to buy

Thanks again
:thumbsup:

They are always improving the chips.. adding stuff like SSE3, lowering power etc.. so each time it's gets a different stepping or code name but model number stays the same.

 

[nshariff22]

Got it

Thanks

 

[nshariff22]

Any idea on release order of these cores, as you mentioned Venice was the latest.

Just trying to avoid being hooked up with an older core ..

 

[Zebo]

Yeah basically there are 5 3500 steppings.

First was CG which includes a cut clawhammer AS and AW

Second was DO, only made the Winchester BI.

Thrid was E3 venice BP

Fourth was E4 Which are nothing but cut down San diegos with half L2 cache disabled, BN and CG

Five is E6 venice, another redesign from #3 but still called venice, a BW

Confused yet?

Edit trust me you want BP or preferably BW in product name..

 

[nshariff22]

Ok ....you also mentioned that new stuff is added to the same chips. where do you get info about what was improved with each steppings

Not confused yet .....

 

[Zebo]

Originally posted by: nshariff22
Ok ....you also mentioned that new stuff is added to the same chips. where do you get info about what was improved with each steppings

Not confused yet .....

I could tell you but it's getting late.. Theres really no point anyway.. alls you need to know is later is better (cept winchester was a couple degrees cooler..but nevermind that)

 

[nshariff22]

Hey Zebo


Thanks a lot ...maybe some other time ..That info did help me lot ....


Thanks :thumbsup:

 

[CP5670]

There is another D0 called BE. I have one (it sucks, can hardly OC at all), although I don't think those ever went into circulation.

 

[RichUK]

Originally posted by: CP5670
There is another D0 called BE. I have one (it sucks, can hardly OC at all), although I don't think those ever went into circulation.

i have a D0 winchester week 51 3500+ which is also crap

 

[Zebo]

Originally posted by: nshariff22
Ok ....you also mentioned that new stuff is added to the same chips. where do you get info about what was improved with each steppings

Not confused yet .....

OK I may be missing some chemistry stuff like Silcon of die insulators but I'll try.


CG 130nm which was hot and used lots of power. These were also just clawhammers design with 1MB LVL2 cache with half of it disabled

DO 90nm chip and built w/ 512KB LVL2 cache. Really really cool.

E3 90nm got SSE3 support and also built w/ 512KB LVL2 cache. Ran cool but 1-3% higher than DO because of xtra instructions.

E4 90nm are nothing special but cut down San diegos E4's with half L2 cache disabled. Also have DDR500 support and SSE3.

E6 90nm venice, another redesign from #3 getting DDR500 support.. e.g better memory controller.

 

[Rottie]

CPU-Z shows that my cpu has code name is Venice and Revision is DH-E6 what is DH? I assumed it is E6 right?