MS ports W10, Linux and tools to all new EDGE based homegrown E2 CPU architecture

[moinmoin]

If this ever comes to fruition this could be very exciting.

https://www.theregister.co.uk/2018/06/18/microsoft_e2_edge_windows_10/

Choice quotes:
(...)
The design of E2 is a radical departure from the computer chips designed by Intel, Arm, AMD, and others. It uses an instruction set architecture known as explicit data graph execution, aka EDGE which isn't to be confused with Microsoft's Edge browser.
(...)
Qualcomm researchers were evaluating two EDGE chip designs with Microsoft: a small R0 core, and an R1 core running up to 2GHz fabricated using a 10nm process. The project, we must stress, is very much a work in progress.
(...)
However, there may be a better way: the EDGE way, as used in the E2. It works by breaking up programs into blocks of simple instructions that can be safely executed together as atomic transactions without data dependencies holding up processing. Within the block, the code uses its own private registers, avoiding having to access a global core-wide register file. The code is also annotated by the compiler to describe the flow of data through the program, allowing the CPU to schedule instruction blocks accordingly.

And, crucially, with many small execution units within a core processing these blocks, many instructions can be executed at once. Rather than eight conveyor belts as in the Cortex-A76, imagine 32 or more, as is the case with the aforementioned Qualcomm R1 design. The R1 is a 32-instruction-wide out-of-order processor blueprint, and the R0 is eight-wide.
(...)

 

[VirtualLarry]

Interesting.

 

[Charlie22911]

So this new architecture is at a high level similar to a GPU? Does this solve many of the parallelization issues with current popular architecture?

 

[moinmoin]

So this new architecture is at a high level similar to a GPU? Does this solve many of the parallelization issues with current popular architecture?

The way I understand it it doesn't tackle multithreading per se (will be very interesting if and how they tackle race conditions), but CPU architecture and compiler combined should ensure that easily parallelizable code fragments can make use of any number of cores and the CPU also gets to know the flow of data through the application, allowing it to specifically prepare for/optimize the remaining huge bottlenecks that are I/O accesses.

 

[maddie]

Why does Itanium keep popping up in my thoughts?

 

[moinmoin]

Why does Itanium keep popping up in my thoughts?

Itanium's EPIC does have some similarities with EDGE, but as far as I can see the compiler produced badly optimized code by today's standards and the platform was a Pentium 4 style room heater, predating the focus on efficiency that dominates processor design since.

 

[Thala]

Why does Itanium keep popping up in my thoughts?

Indeed. EPIC was my first thought when reading this

 

[Cerb]

Reading two of the papers, this looks very much like something to build into a DSP design, or something like that, from a set of software libraries, rather than license some more ARM or MIPS cores, which add their own overheads, and other issues. Then, later on, if all goes well, get your ASICs derived from the FPGA design. There's plenty there that specifically deals with FPGA issues, rather than general purpose computing. So, something you'll never actually see, that could end up lurking inside of your camera's chip, a packet inspection engine, visual pattern recognition/tracking hardware, and so on. Explicit knowledge about the hardware's memory isn't really a problem, in those kinds of devices.

 

[moinmoin]

Article was update with following statement:

After publication, a spokeswoman for Microsoft got back to us with some extra details. "E2 is currently a research project, and there are currently no plans to productize it," she said.


"E2 has been a research project where we did a bunch of engineering to understand whether this type of architecture could actually run a real stack, and we have wound down the Qualcomm partnership since the research questions have been answered."

 

[soresu]

If this ever comes to fruition this could be very exciting.

https://www.theregister.co.uk/2018/06/18/microsoft_e2_edge_windows_10/

Choice quotes:
(...)
The design of E2 is a radical departure from the computer chips designed by Intel, Arm, AMD, and others. It uses an instruction set architecture known as explicit data graph execution, aka EDGE which isn't to be confused with Microsoft's Edge browser.
(...)
Qualcomm researchers were evaluating two EDGE chip designs with Microsoft: a small R0 core, and an R1 core running up to 2GHz fabricated using a 10nm process. The project, we must stress, is very much a work in progress.
(...)
However, there may be a better way: the EDGE way, as used in the E2. It works by breaking up programs into blocks of simple instructions that can be safely executed together as atomic transactions without data dependencies holding up processing. Within the block, the code uses its own private registers, avoiding having to access a global core-wide register file. The code is also annotated by the compiler to describe the flow of data through the program, allowing the CPU to schedule instruction blocks accordingly.

And, crucially, with many small execution units within a core processing these blocks, many instructions can be executed at once. Rather than eight conveyor belts as in the Cortex-A76, imagine 32 or more, as is the case with the aforementioned Qualcomm R1 design. The R1 is a 32-instruction-wide out-of-order processor blueprint, and the R0 is eight-wide.
(...)

A shame that E2 seems to have gone bellyup since then 😞

I followed EDGE and then E2 with great interest during the last decade, but unless it's just gone into stealth mode it seems to have fizzled out.