MFLOPs instead of PR rating? Poll

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BowlingNut

Member
Aug 18, 2002
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Originally posted by: Boonesmi
if any universal benchmark was agreed on it seems like both intel and amd would start optimizing their cpu's for the benchmark but who cares about a synthetic benchmark?

thats whyd you have two sets of benchmarks, where each set leans towards one architecture type....as soon as AMD tries to optimize for the "intel" benchmark, theyd lose performance int he "amd" benchmark....thus the score would be nearly equal. only way to improve the rating would be to improve in both categories or improve in one dramatically. maybe report the average and the individual scores on the "amd" and "intel" sets? and while synthetic benchmarks dont really prove anything in the real world, a composite synthetic benchmark comes a lot closer to showing real world performance.... or evena composite application/game based benchmarking system. in either case, identical setups with simple mobo/cpu combos could show the performance difference in the two processors and the basic subsystems. however, this is getting too complex to eliminate variables....i'd have to agree the mip/mflop combo ratings would be the best alternative right now.
 

AntiAMD

Member
Aug 10, 2002
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It actually wouldn't be that difficult to make a good mips calculator. Code it in ASM for x86 instructions. Have it run random x86 instructions, adding a number
to a register after every instruction processed for safe keeping, run for 5 seconds, tally the numbers (including the addition, random generation, loading the registers etc, these are all using instructions) and divide by 5, voila, mips. The neat thing about counting instructions is that it would be very difficult to "optimize" how many instructions your cpu can do per second without actually making the chip handle more instructions per second, thereby making a faster cpu, and thereby keeping the test honest. Think of this, Intel and AMD could both work at trying to optimize their cpu's to be able to perform more instructions per second (x86), how original.

As a side note, this would not be a windows program, windows comes with its own overhead (too many to list, and too many things would have to be shut off while the counting is taking place). Dos only, boot floppy. Program loads into memory, not ram, as this can be manipulated by the system bus, etc., etc.
Hmm.. second thought, won't work. The thought was you could write a program to load into the 8kb of level 1, but not sure if a program can be executed from here (I may NOT be the smartest ;) and the level 1 would be needed to, well, make the cpu run better.

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The blue guys in my cpu are already dancing around in anticipation
 

Nothinman

Elite Member
Sep 14, 2001
30,672
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The neat thing about counting instructions is that it would be very difficult to "optimize" how many instructions your cpu can do per second without actually making the chip handle more instructions per second, thereby making a faster cpu, and thereby keeping the test honest.

The overall speed is still affected by a lot of other things, like how many cycles does 1 instruction take? What about memory accesses, with Hammer having a memory controller on die it'll be a good bit faster than Intel's offerings in that respect.

Dos only, boot floppy. Program loads into memory, not ram, as this can be manipulated by the system bus, etc., etc.

What memory can the program load into that's not in RAM. You can't leave it in the CPU cache, that'll affect the benchmark too much, and I don't even think you can directly manipulate that. Also why use DOS? Just use a little x86 boot code (Linux is a good place to start, memtest86 got theirs from there) and you don't have to worry about differences from running in real vs protected mode.

There's no way to compare CPU vs CPU and have it be accurate. It's like saying car engine A is faster than car engine B, while car engine A may have more HP (Mhz) if you put it in a chasis that's twice as heavy as the one engine B is in it's going to lose.

SPECint and SPECfp are the only thing close to a really valid test.
 

zephyrprime

Diamond Member
Feb 18, 2001
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mflops is no good as a measurement at all. A chip company could easily put out a deceptive mflop number by making a floating point sign inversion function (which is one of the easiest flops) that takes 1 cycle and make it so SSE provides a vector version of this operation and then MFLOPS would scale perfectly linearly with MHz! Floating point would still not necessarily be any good but the MFLOPs number would be great!
 

paralazarguer

Banned
Jun 22, 2002
1,887
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You guys seem to be forgetting an important factor.
YOu can measure MIPS and MFLOPS all you want but that doesn't give a picture of a processor's performance.
It's possible that when AMD reaches the XP core to higher Mhz and doesn't increase the FSB, there may be a bottleneck and indeed already is with some applications acording to aceshardware.
If you have a benchmark that flings math operations around the processor to measure the MIPS or MFLOPS you'll get an accurate speed rating of the architecture of the processor.
This will not, however, tell you if the processor is being bottlenecked by a slow FSB that only 3d rendering or gaming etc can saturate.
Therefore, wich such a bottlenecked processor, you would get a very different real world performance from what the MIPS and MFLOPS are telling you.
 

AntiAMD

Member
Aug 10, 2002
46
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Originally posted by: Nothinman

The overall speed is still affected by a lot of other things, like how many cycles does 1 instruction take?

I never gave any thought to which instructions to pick from at random, as I don't have an opcode list in front of me that has clocks per instruction listed, my bad :p But, now that you mention it, why not see how many times we can RL the accumulator, or better yet, why not just NOP for 5 seconds, see how many we get. I was musing, I'm not going to write it.

What about memory accesses, with Hammer having a memory controller on die it'll be a good bit faster than Intel's offerings in that respect.

It could have a toothbrush and kiss me goodnight too, but my point is all about mips, end results, not features.

What memory can the program load into that's not in RAM.

I was thinking flash, but I thought again.

You can't leave it in the CPU cache, that'll affect the benchmark too much, and I don't even think you can directly manipulate that.

You just echoed what I had already said in that message ;)

Also why use DOS? Just use a little x86 boot code (Linux is a good place to start, memtest86 got theirs from there) and you don't have to worry about differences from running in real vs protected mode.

Which boot mode you choose if you were going to use my method would be arbitrary, as you would only need "something" to boot into that would run a program that would flash hex into the cpu, once the cpu was loaded with the hex, that becomes the "OS" for the next 5 seconds. It was just a thought, a 'muse' if you will.

There's no way to compare CPU vs CPU and have it be accurate. It's like saying car engine A is faster than car engine B, while car engine A may have more HP (Mhz) if you put it in a chasis that's twice as heavy as the one engine B is in it's going to lose.

Which gets us back to my original point of testing the cpu independent of the motherboard. Only then could we get an accurate measure of cpu to cpu. I don't want to test cpu's that use system ram, system bus, etc. as this is not an accurate picture of cpu, but rather how well a cpu communicates with the north bridge, north bridge to ram, etc.

Suffice it to say, I believe in mips. Software, all software, is made up of instructions, the more instructions a cpu can do per second, the faster the cpu is, period.