Look at this table :
multi, 166, 183(multi-1.0), cpu diff
10.0, 1660, 1647.0, 13
10.5, 1743, 1738.5, 4.5
11.0, 1826, 1830.0, -4
11.5, 1909, 1921.5, -12.5
12.5, 2075, 2104.5, -29.5
If you are not considering the multiplier, the cpu clock will vary significantly if the multi goes beyond the table.
So the closest cpuclocks will look like below for an example.
multi, 167, 183(multi-1.0), cpu diff
11.5, 1920.5, 1921.5, -1
The number one factor for the realtime performance is the cpu speed.
So the performance will vary depending on the multiplier you choose, which will be mostly affected by the cpu overclockability.
This problem is caused by the current pc architecture, which means we need the pc setting the clock directly.
It is because the mem clock is designed to be tied with cpu fsb.
If we can set the mem clock totally independant and cpuclock directly then we will be free from the multi*fsb effect(*check Edit).
Current advanced solutions for memory clock independance are not still all perfect.
Why are they setting the gaps by adopting the cpu:mem clock ratio?
Some bioses are adopting mem/cpu %, which is still similar to the previous one.
Only a few boards are providing real solution by allowing setting the mem clock by 1mhz increments.
But they still have the cpu fsb * multi architecture(*check Edit) unresolved.
The other problem for comparing the performance is from the memory timings nature.
166, 2.0,2,2,5 vs 183,3.0,3,3,8 ?
Are they both 100% optimized?
Because of the settings not being continuous(analog), the increment of the last 4 numbers results in big differences.
So they are just rounded for the memory clock and hardly can be all optimized together.
Because of these limitations, we need to be careful when comparing or analyzing the performance.IMHO
[Edit for cpu fsb * multi architecture]
By further
research, I've got the conclusion that under the current architecture the CPU FSB is unavoidable.
It needs to be fast enough to cover the traffics between the cpu and northbridge(and southbridge).
The higher will be better for the overal performance.