Load Line Calibration (LLC) still a danger when running stock voltage?

[jrichrds]

There was an article I read about LLC (on Anantech I believe) which expounded on the dangers of enabling LLC due to the voltage spikes that it caused. Is it a danger only when you're running close to max voltage already? Or could it be a danger when running your CPU at stock voltage too?

I basically take my CPU as high as it will go on stock voltage, and wonder if LLC can safely get me a slightly higher overclock without having to increase vCORE.

 

[soccerballtux]

When you're at stock voltage it's not a problem because the voltage spikes are almost definitely going to be within the allowed voltage limits per Intel.

Also, one of these days I'll run the math behind it*, but it's a little nasty and heavy on QM so I'm not very motivated to do it, but the benefits of LLC (keeping the chip at a lower voltage when idle (basically 24/7 for me)) almost certainly outweigh the consequences. The number of electrons that tunnel into the dielectric (thereby reducing electrical insulation properties) during the short voltage spikes would depend on the period of these harmonics. My hunch, however, is that keeping the vcore at say 0.3v higher during idle causes far more damage than these voltage spikes. The harmonics should have a pretty short period and normalization time. Keep in mind these harmonics occur any time the chip changes power state, or takes on/finishes load at a given power state. The issue would be the short spikes above 1.5v (in the case of my chip) or whatever voltage your processor is spec'd for; and how large these spikes were-- which of course depends on the chip and the load. If the delta voltage levels and the oscillation period and time to normalize can be known, then a real calculation could be run.

*Unless IDC beats me to it.

 

[Idontcare]

Yeah the poor man's method here would be to think of the "area under the curve". Voltage over time. What's worse, 1.7V for 100ms or 1.6V for 500ms?

Neither option is good, but knowing which is worse is only half the question, the other half of the question is figuring out when not good means unacceptably not good versus acceptably not good.

For example, running my chip at 1.6V is not good, but that may merely mean the chip will die in 3 yrs instead of 20. So that is acceptably not good. But running my chip at 1.7V may mean it dies in 6 months, and for me that may be unacceptable...ergo unacceptably not good.

So is LLC "not good"? Undoubtedly. Is it unacceptably not good? No one has reported LLC killed their chip yet, and we got a pretty sizable active Internet community these days.

Is LLC more acceptable than running your chip at an otherwise higher idle voltage to compensate for the lower Vcc during load because of Vdroop? Contrary to Anandtech's article on the topic, it would appear that it is more acceptable in certain scenarios, as soccerballtux outlined.

I'll add my personal experience to this otherwise theory-based discussion. Without LLC my QX6700 required 1.60V for 4GHz stable at load (this was under phase, so scale the GHz down but keep the Vcc the same to convert this to an "on air" example) but with LLC my chip only needed a 1.50V Vcc. (edit: corrected the voltages, I had them 0.05V too high once I looked at my notes, memory getting weak)

Now the dominant mechanisms of voltage induced degradation are exponentially dependent on the voltage (i.e. your typical activation barrier kinetically limited reactions), so the ability to run my chip 0.1V lower in Vcc during all those hours of the system being idle means a substantial improvement in lifetime versus the trade-off that comes in transients that may spike to 1.75V (0.2V over-volt transient) for a few hundred microseconds when the chip goes from loaded to unloaded.

Both options are *not good* for my chip by Intel's specs and standards, but the question is whether or not one of the two options is unacceptably not good. I have no way of knowing, but I opted for the LLC choice and ran my chip at 0.1V less. It may have merely made the difference between my chip living 4 yrs instead of 5 yrs, I have no plans of giving it the chance to let me find out. It will be replaced long before then.

 

[n7]

I use it for the same reason as the two posters above me.

I cannot stand the idea of having to run such a high idle vcore, due to vdroop.

My PC spends WAY more time idle than load, & as i do not believe LLC is going to kill anything if you are using reasonable vcore, i will continue to use it.

 

[iCyborg]

I also use LLC enabled for the same reason as the people above. The difference between overshoots with and without LLC is vdroop which doesn't seem too big so that it would be a deal breaker during a few milliseconds...
But are there any data on how big these spikes from full load to idle actually are?

 

[Idontcare]

Originally posted by: iCyborg
I also use LLC enabled for the same reason as the people above. The difference between overshoots with and without LLC is vdroop which doesn't seem too big so that it would be a deal breaker during a few milliseconds...
But are there any data on how big these spikes from full load to idle actually are?

None that I am aware of, but the nature of transient voltages is such that we can't possibly rely on software based freebie apps like cpuz to detect them. We'd need some serious timing electronics to catch the transients formation, peak, and decay with some good time resolution in order to really catch the value of the peak.

I'm sure the mobo makers have the data from their characterization of their implementation of LLC.

 

[dust]

Not sure if it's the same thing, but the report graphs in OCCT may show this. I mean, they do show sudden changes for the vcore, 3.3v. 5v and 12v

 

[soccerballtux]

Originally posted by: Idontcare

Originally posted by: iCyborg
I also use LLC enabled for the same reason as the people above. The difference between overshoots with and without LLC is vdroop which doesn't seem too big so that it would be a deal breaker during a few milliseconds...
But are there any data on how big these spikes from full load to idle actually are?

None that I am aware of, but the nature of transient voltages is such that we can't possibly rely on software based freebie apps like cpuz to detect them. We'd need some serious timing electronics to catch the transients formation, peak, and decay with some good time resolution in order to really catch the value of the peak.

I'm sure the mobo makers have the data from their characterization of their implementation of LLC.

If they do they could technically take this into account when programming the LLC; using the same principle that Bose noise canceling headphones use.