- Jun 24, 2001
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I remember reading about it here somewhere LOOOONG ago.
Can anyone get me that information again? I tried Google.
Edit: Found it.
Page 12, errata 5
"Intel® 82850/82850E MCH
5. Sustained PCI Bandwidth
Problem: During a memory read multiple operation, a PCI master will read more than one complete cache
line from memory. In this situation, the MCH pre-fetches information from memory in order to
provide optimal performance. However, the MCH cannot provide information to the PCI master
fast enough. Therefore, the Intel® 82801BA terminates the read cycle early to free up the PCI bus
for other PCI masters to claim.
Implication: The early termination limits the maximum bandwidth to ~90 MB/s.
Workaround: None
Status: There are no plans to fix this erratum."
So the i850 and i850E are limited to less than 90MB/s (Less after PCI overhead). Sucks. My D850GB file server is probably going to have trouble with Gigabit + RAID5
Time to make a post about that...
Can anyone get me that information again? I tried Google.
Edit: Found it.
Page 12, errata 5
"Intel® 82850/82850E MCH
5. Sustained PCI Bandwidth
Problem: During a memory read multiple operation, a PCI master will read more than one complete cache
line from memory. In this situation, the MCH pre-fetches information from memory in order to
provide optimal performance. However, the MCH cannot provide information to the PCI master
fast enough. Therefore, the Intel® 82801BA terminates the read cycle early to free up the PCI bus
for other PCI masters to claim.
Implication: The early termination limits the maximum bandwidth to ~90 MB/s.
Workaround: None
Status: There are no plans to fix this erratum."
So the i850 and i850E are limited to less than 90MB/s (Less after PCI overhead). Sucks. My D850GB file server is probably going to have trouble with Gigabit + RAID5