Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

TSMC Radically Boosts CapEx to Expand Production Capacities, To Reach $14B For 2019

www.anandtech.com

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

Samsung’s Aggressive EUV Plans: 6nm Production in H2, 5nm & 4nm On Track

www.anandtech.com

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[Thibsie]

That still doesn't make sense. Exactly what are you claiming Apple is getting made in N3B now that they wouldn't have gotten made before they supposedly "bought up what Intel had originally requested". Are you claiming Apple was not going to make A17 in N3B originally? Or that A17 will be used in all iPhone 15s now but originally it was planned only for the Pro/Pro Max?

If Apple is buying extra capacity Intel had previously bought, they have to getting MORE N3B chips than they had originally contracted for. That means there is something Apple is getting made in N3B now that they previously would not have.

I think it is far more likely that TSMC originally had exactly two major N3B customers, one of them dropped out so they reallocated those lines for N3E which is where they have been strongly encouraging customers to go as it is the "long lived" node that fixes the yield issues with N3B. Apple is getting the exact same quantity of N3B chips they had always been planning on, they are not getting any of "Intel's allocation". To keep Apple happy with N3B's shortcomings, TSMC agreed to sell by known good die rather than per wafer, so that Apple doesn't have to accept the costs of TSMC's failure on N3B - which may have meant TSMC allocating more wafer starts to Apple than they originally planned but that's on them once again for screwing up N3B.

If it is true that Apple will be switching from N3B to N3E once N3E is available (i.e. in the middle of the A17 manufacturing cycle) then I'm guessing either TSMC is eating the cost for that (i.e. new mask sets and any required design rework) or TSMC requiring that transition midstream was the price for the KGD deal.

Or N3B yields are just worse than thought before ?

 

[Ajay]

Or N3B yields are just worse than thought before ?

Well, what ever the yields actually are - TSMC has more capacity than Apple needs right now, even with KGD.

 

[Doug S]

Or N3B yields are just worse than thought before ?

Well that would lead to more wafers being consumed by Apple, but if Intel had kept their commitment and TSMC's bad yields had led to Apple getting fewer good dies than what they needed that would lead to shortages in iPhone 15 models that could last for months until N3E ramped. Even a rumor that Apple was engaging in discussions with Intel due to that failure on TSMC's part (which would be a good guess even if that was not known for certain) would deal a major blow to TSMC's stock price.

So here's an alternative possibility I haven't seen discussed. What if TSMC, seeing this possibility when they realized N3B was in trouble, paid Intel to free up their N3B wafers so TSMC could take care of their most important customer? A customer who, unlike Intel, does not own their own fabs giving no reason to regularly patronize TSMC? Maybe they paid Intel to delay their orders, or maybe they bought back that capacity at a premium - and Intel, not really needing it since AMD was taking more of their market share and the PC market was slowing down anyway, was happy to oblige?

 

[Thibsie]

Well that would lead to more wafers being consumed by Apple, but if Intel had kept their commitment and TSMC's bad yields had led to Apple getting fewer good dies than what they needed that would lead to shortages in iPhone 15 models that could last for months until N3E ramped. Even a rumor that Apple was engaging in discussions with Intel due to that failure on TSMC's part (which would be a good guess even if that was not known for certain) would deal a major blow to TSMC's stock price.

So here's an alternative possibility I haven't seen discussed. What if TSMC, seeing this possibility when they realized N3B was in trouble, paid Intel to free up their N3B wafers so TSMC could take care of their most important customer? A customer who, unlike Intel, does not own their own fabs giving no reason to regularly patronize TSMC? Maybe they paid Intel to delay their orders, or maybe they bought back that capacity at a premium - and Intel, not really needing it since AMD was taking more of their market share and the PC market was slowing down anyway, was happy to oblige?

Interesting take IMO

 

[qmech]

And yet Intel's performance was poorer in thermals compared to TSMC's 7nm. You could give Intel N3 today and they'd still make it a firebox through poor design choices.

Pay for the report or don't. don't kill the messenger. Email techinsights and argue with them.

TechInsights didn't try to bash Intel's process. You did.

TechInsights didn't make their summary seem like "SMIC knocked it out of the park". You did and then started ranting about Intel when I pointed out the actual claim (singular) made in the summary.

Why are you pretending I have an issue with TechInsights?

As for power consumption, as I stated previously, Intel and TSMC have very different design goals, so a direct comparison is not trivial. This is one of the things that is going to make it very interesting to watch Intel try its hand at leading-edge foundry services. I would love to see a large ARM chip on Intel3 and how that compares to similar ARM chips on whatever TSMC is on at that point.

 

[A///]

TechInsights didn't try to bash Intel's process. You did.

TechInsights didn't make their summary seem like "SMIC knocked it out of the park". You did and then started ranting about Intel when I pointed out the actual claim (singular) made in the summary.

Why are you pretending I have an issue with TechInsights?

As for power consumption, as I stated previously, Intel and TSMC have very different design goals, so a direct comparison is not trivial. This is one of the things that is going to make it very interesting to watch Intel try its hand at leading-edge foundry services. I would love to see a large ARM chip on Intel3 and how that compares to similar ARM chips on whatever TSMC is on at that point.

It's not bashing if it's correct.

 

[qmech]

It's not bashing if it's correct.

Indeed, but you are not correct.

Calling Intel7 a 10 nm node while claiming 7 nm for TSMC N7 is silly. Either they are both 7 nm or they are both 10 nm. And if they are 10 nm, then so is SMIC N+1 and N+2.

Just look at density if you want. Intel7 has a density of around 100 MTr/mm². TSMC's 10nm node, 10FF, barely cracked 50 MTr/mm² - just like Samsung's 10LPx. To get densities that come close to Intel7, you need to go to N7 and 7LPx which both have densities just above 90 MTr/mm². Still less dense than Intel7, but close.

As for SMIC's "N+2 7nm", it appears to be very close to TSMC's N7. There are some reports in Chinese media that the density is around 110 MTr/mm². Given the earlier report from TechInsights that N+1 used single diffusion breaks and a 6T minimum track height (2x2 fins), that matches very closely with TSMC's N7+ density. This TSMC node uses EUV to do away with the quad-patterning on the bottom four layers, but otherwise sticks to N7 pitches.

 

[DrMrLordX]

Either they are both 7 nm or they are both 10 nm.

How bout they are neither 10nm nor 7nm? Even Intel 10nm was just a name.

 

[qmech]

How bout they are neither 10nm nor 7nm? Even Intel 10nm was just a name.

Obviously, it's been a long time since the naming convention has matched any critical dimensions. That's neither here nor there in the context of the discussion, however, which centers on A///'s claim that SMIC N+2 is the greatest thing since sliced bread which appears to be rooted in an inability to parse TechInsight's summary and a misunderstanding (presumably deliberate) of Intel's naming convention.

 

[igor_kavinski]

SMIC N+2

SMIC N+2 in Huawei Mate Pro 60 - Semiwiki

Up until last December I was president and owner of IC Knowledge LLC, at the end of November, I sold IC Knowledge LLC to TechInsights. It has been interesting to become an insider at the world’s leading semiconductor reverse engineering and knowledge company. The latest SMIC N+2 analysis is an...

semiwiki.com

The overall high density logic transistor density for N+2 is intermediate between TSMC 7nm and 7nm+ making it a solid 7nm process. There is even some room to further shrink the pitches with double patterning to achieve something along the lines of TSMC 6nm densities in a future process (N+3?).

SMIC Mass Produces 14nm Nodes, Advances To 5nm, 7nm

SMIC ramps up 14nm production, proceeds with sub-10nm technologies.

www.tomshardware.com

So they jumped from 14nm to 7nm in about one year? Isn't that impressive?

 

[A///]

Calling Intel7 a 10 nm node while claiming 7 nm for TSMC N7 is silly.

Erm no. It was Intel calling a 10nm++++ node an Intel 7 node actually, that is silly.

 

[A///]

which centers on A///'s claim that SMIC N+2 is the greatest thing since sliced bread which appears to be rooted in an inability to parse TechInsight's summary and a misunderstanding (presumably deliberate) of Intel's naming convention.

Again no. Where did I claim it's the greatest thing since sliced bread? I'd appreciate it if you didn't make up wild and ludicrous claims of things I've never stated on here. SMIC 7nm is still 5 years minimum behind cutting edge and it will have a limit of what's possible going forward. Unless SMIC or China can get their hands on EUV machines which need maintenance to maintain production or have access to the chemicals needed, or heck, make their own, they're still screwed by sanctions.

Please show me where I'm even remotely excited about SMIC doing this. If it isn't clear by now I personally prefer other countries relying on the west to survive, not doing their own thing.

 

[eek2121]

Erm no. It was Intel calling a 10nm++++ node an Intel 7 node actually, that is silly.

Continuing to try to use Intel’s old names is silly. Intel 7 is at parity with TSMC N7, so if you call Intel 7 “10nm”, you should call TSMC N7 and “10nm” as well.

Or for those doing it: just quit trying to be that person and call it what it is named today.

 

[A///]

Continuing to try to use Intel’s old names is silly. Intel 7 is at parity with TSMC N7, so if you call Intel 7 “10nm”, you should call TSMC N7 and “10nm” as well.

Or for those doing it: just quit trying to be that person and call it what it is named today.

I go by the previous names, not what Intel decided out of the blue based on stats. Even if they're at parity, performance is terrible. Unless that is you mean performance is great only because Intel can crank the frequency up more than TSMC's nodes can but at the cost of greater electricity use and more generated heat.

 

[Roland00Address]

I go by the previous names, not what Intel decided out of the blue based on stats. Even if they're at parity, performance is terrible. Unless that is you mean performance is great only because Intel can crank the frequency up more than TSMC's nodes can but at the cost of greater electricity use and more generated heat.

Do not go gentle into that good [name] 🌒

 

[A///]

Do not go gentle into that good [name] 🌒

They make good room heaters. Not as good as Pentium 4. Saved quite a bit of firewood and gas this past winter.

 

[DrMrLordX]

Obviously, it's been a long time since the naming convention has matched any critical dimensions. That's neither here nor there in the context of the discussion, however, which centers on A///'s claim that SMIC N+2 is the greatest thing since sliced bread which appears to be rooted in an inability to parse TechInsight's summary and a misunderstanding (presumably deliberate) of Intel's naming convention.

It's more-relevant (in the case of Intel 7/10nm, TSMC N7, and SMIC N+1/N+2) to simply compare the density and performance characteristics of each node. N+2 is definitely not the greatest thing since sliced bread. At least based on the 9000S in the Kirin 60, there's quite a bit not to like about it. Whether that's owing completely to the node or to the outdated Taishan core design is another matter.

 

[A///]

It's more-relevant (in the case of Intel 7/10nm, TSMC N7, and SMIC N+1/N+2) to simply compare the density and performance characteristics of each node. N+2 is definitely not the greatest thing since sliced bread. At least based on the 9000S in the Kirin 60, there's quite a bit not to like about it. Whether that's owing completely to the node or to the outdated Taishan core design is another matter.

I never claimed it was the best thing since sliced bread. No idea what he's talking about. Will put him on ignore since he's trying to get a rise out of me.

 

[SiliconFly]

Erm no. It was Intel calling a 10nm++++ node an Intel 7 node actually, that is silly.

No. Calling Intel 7 as 10nm++++ is silly.

 

[A///]

No. Calling Intel 7 as 10nm++++ is silly.

You're right. It's really only 10nm++.

 

[controlflow]

Erm no. It was Intel calling a 10nm++++ node an Intel 7 node actually, that is silly.

If we are ok with TSMC N7 as a name then it is also reasonable to be ok with Intel 7 given the characteristics of both nodes.

In the past, TSMC and Samsung have both decreased the number on their node names for incremental improvements to the process that in older Intel terminology would have just been a "+". Somehow most people were ok with that but they seem to lose their minds when Intel does it too.

 

[A///]

If we are ok with TSMC N7 as a name then it is also reasonable to be ok with Intel 7 given the characteristics of both nodes.

In the past, TSMC and Samsung have both decreased the number on their node names for incremental improvements to the process that in older Intel terminology would have just been a "+". Somehow most people were ok with that but they seem to lose their minds when Intel does it too.

I'm aware of the stupid naming conventions. While TSMC 7 and Intel "7" (10nm++ SF) are similar in density and pitch, one still out performs the other. Intel's node gives them the ability to clock higher at the cost of heat and power. Are we really ignoring that Intel needs that plus 24 total cores with 8 of them having HT to compete or uncomfortably beat a 7950X while using more power?

Intel can notch down a few nodes in the next few years but their design choices leave a lot to be desired. Needing to pump out higher frequency and more cores to match 16 SMT cores is sad.

 

[SiliconFly]

I'm aware of the stupid naming conventions. While TSMC 7 and Intel "7" (10nm++ SF) are similar in density and pitch, one still out performs the other. Intel's node gives them the ability to clock higher at the cost of heat and power. Are we really ignoring that Intel needs that plus 24 total cores with 8 of them having HT to compete or uncomfortably beat a 7950X while using more power?

Intel can notch down a few nodes in the next few years but their design choices leave a lot to be desired. Needing to pump out higher frequency and more cores to match 16 SMT cores is sad.

I don't think you do. You're trying to compare an 24 core intel cpu built on a ageing 7nm class node (Intel 7) with a amd cpu (7950X) built on a more advanced 5nm class node (TSMC N5).

Of course, Intel needs to crank up power & frequency to compete.

 

[A///]

I don't think you do. You're trying to compare an 24 core intel cpu built on a ageing 7nm class node (Intel 7) with a amd cpu (7950X) built on a more advanced 5nm class node (TSMC N5).

Of course, Intel needs to crank up power & frequency to compete.

Yes, I am aware. Intel 7 is Intel 10nm Enhanced Superfin. Intel "7" relatively matches TSMC's 7nm spec. Let's say they're both 7nm here. Intel's only upper hand is frequency. They pushed frequency and extra cores to match or just beat AMD. At the top of the scale the 13900KS is the better buy if you want true speed. The impending 14900K is certainly faster on paper than a 7950X.

My point here was even if both companies had node access parity, Intel would still lose due to poor design. If AMD manufactured a Zen product on Intel's IFS in the future and Intel used that same node, AMD would still be ahead of them. Intel is an ego filled company that's experiencing brain drain and keeps hacking off bits and pieces of itself through layoffs. Intel will continue to add on efficiency cores and ramp up the frequencies and need to utilise TSMC because they can't do all the work themselves.

To clarify here I don't own AMD or Intel stock, and I haven't owned an AMD product in around 25 years.

 

[eek2121]

I go by the previous names, not what Intel decided out of the blue based on stats. Even if they're at parity, performance is terrible. Unless that is you mean performance is great only because Intel can crank the frequency up more than TSMC's nodes can but at the cost of greater electricity use and more generated heat.

I'm aware of the stupid naming conventions. While TSMC 7 and Intel "7" (10nm++ SF) are similar in density and pitch, one still out performs the other. Intel's node gives them the ability to clock higher at the cost of heat and power. Are we really ignoring that Intel needs that plus 24 total cores with 8 of them having HT to compete or uncomfortably beat a 7950X while using more power?

Intel can notch down a few nodes in the next few years but their design choices leave a lot to be desired. Needing to pump out higher frequency and more cores to match 16 SMT cores is sad.

Raptor Lake looks like it beats Zen 3 (desktop) quite easily to me.

AMD had to bump up power limits for Zen 4 (which is on 5nm) just to compete, even though Intel was technically at a disadvantage. Intel still wins many benchmarks in terms of absolute performance, and does quite well in terms of efficiency if you cap the power limits.

Remember, AMD’s first N7 product was Zen 2.