Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[A///]

I can only hope. TSMC's price hikes are probably part of Nvidia and AMD's ridiculous GPU pricing.

If ifs isn't a complete joke and intel's future nodes turn out to be good tsmc will want to be competitive even with their 5nm fab in phoenix. my hunch on where the "top brass" from intel samsung and tsmc employees are renting or buying up homes is paradise valley. It's a 20 min drive to either of the locations and nice enough compared to everyewhere else in the area. homes have been rapidly closing on sales the past 2 years, higher than the rush of the pandemic.

 

[Doug S]

With the semicon market sagging the way it is, it's hard to imagine wafer prices increasing as aggressively as they did between 2019-2021.

The bulk of the price increases were because their per wafer costs were increasing. They've gone from zero EUV layers to 20+ (for N3) since 2019, and have already reached the point where they need double patterning for critical EUV layers. That's on top of EUV hardware costing far more than DUV hardware, and having a lower wph throughput to boot.

TSMC can't say "we'll raise prices a bit because we are at capacity so we know they'll pay" like they could a couple years ago. They can increase prices for new nodes like they did when they introduced N7 and N5, which were a lot more expensive to operate than the node that came before. Rather than reduce prices it is more likely they slow their planned increases in wafer capacity by delaying planned fab expansions and equipment deliveries.

If they think a recent node like N7 that's underutilized now will remain underutilized for the foreseeable future they may shut down some of its capacity and redeploy its equipment (and workers) elsewhere. If you are 30% underutilized and shut down 25% of your capacity, then suddenly you are at 95% utilization and there is no pressing need to reduce prices.

Since N5 already had so many EUV layers N3 (especially N3E) doesn't add many more, so the increase from N5 to N3 should be a lot less than the increase from N7 to N5 was. But we'll have to wait until next year for reports of that pricing to emerge, since Apple is their only customer of note for N3 this year.

 

[moinmoin]

TSMC's price hikes are probably part of Nvidia and AMD's ridiculous GPU pricing.

I'd say Nvidia's GPU pricing predates their current use of TSMC nodes as well as their price hikes. And as the popular undisputed market leader they set the prices.

 

[Dayman1225]

Intel has a paper at VLSI coming up detailing PowerVia implementation on Intel 4 on an Atom/E core

https://twitter.com/x/status/1653414076486123520

 

[Henry swagger]

Intel has a paper at VLSI coming up detailing PowerVia implementation on Intel 4 on an Atom/E core

https://twitter.com/x/status/1653414076486123520

Very interesting

 

[A///]

Very interesting

seems they may be exploring what you said the other night about and amd style cache. I'd be surprised if intel has unlocked the secret to running cores and cache full bird sail without it becoming toasted like x3d lately.

 

[FlameTail]

Updated Samsung process node chart

 

[A///]

View attachment 80301
Updated Samsung process node chart

this is safe to ignore until samsung can deliver and prove their gaa tech is worth customers going to them. samsung has been on an abysmal train journey for several years now and their foray into the ddr5 world has been equally awful. their supplied chart here might as well be scribbles from a child's art class.

 

[FlameTail]

this is safe to ignore until samsung can deliver and prove their gaa tech is worth customers going to them. samsung has been on an abysmal train journey for several years now and their foray into the ddr5 world has been equally awful. their supplied chart here might as well be scribbles from a child's art class.

The rumour mill on twitter is favourable towards Samsung. Apparently Samsung has made substantial improvements to their nodes (in terms of yield as well as perf/efficiency) and may even overtake TSMC in the 3nm era especially due to TSMC's own struggles with 3nm.

But as you said, it remains to be seen. Samsung has to prove themselves

 

[FlameTail]

View attachment 80301
Updated Samsung process node chart

BTW isn't anyone interesting in analysing this chart?

1) They have added several new nodes which we haven't seen before (4LPP+, 3GAP+, 5LPE-A).

2) Also what does the A stand for in Samsung foundry vocabulary? Is it for 'Advanced' or 'Automotive' ?

 

[Ajay]

BTW isn't anyone interesting in analysing this chart?

1) They have added several new nodes which we haven't seen before (4LPP+, 3GAP+, 5LPE-A).

2) Also what does the A stand for in Samsung foundry vocabulary? Is it for 'Advanced' or 'Automotive' ?

Not so much. Samsung hasn’t been able to capture any well known ODM on the bleeding edge lately. The deal with Nvidia was fraught with problems and ended badly for Samsung's Logic division.

 

[jpiniero]

TSMC overseas foundry quotes to be 10-30% higher than in Taiwan

TSMC has begun to formulate pricing strategies for its new overseas wafer fabs. Quotes for advanced chips to be fabricated by its plant in Arizona are estimated to be 20-30% higher than corresponding prices in Taiwan, while mature process chips from its plant in Japan's Kumamoto could be 10-15%...

www.digitimes.com

TSMC is going to charge 20-30% more for chips fabbed in Arizona.

 

[Ajay]

TSMC overseas foundry quotes to be 10-30% higher than in Taiwan

TSMC has begun to formulate pricing strategies for its new overseas wafer fabs. Quotes for advanced chips to be fabricated by its plant in Arizona are estimated to be 20-30% higher than corresponding prices in Taiwan, while mature process chips from its plant in Japan's Kumamoto could be 10-15%...

www.digitimes.com

TSMC is going to charge 20-30% more for chips fabbed in Arizona.

Requires sub - which is $495/yr!!

 

[maddie]

TSMC overseas foundry quotes to be 10-30% higher than in Taiwan

TSMC has begun to formulate pricing strategies for its new overseas wafer fabs. Quotes for advanced chips to be fabricated by its plant in Arizona are estimated to be 20-30% higher than corresponding prices in Taiwan, while mature process chips from its plant in Japan's Kumamoto could be 10-15%...

www.digitimes.com

TSMC is going to charge 20-30% more for chips fabbed in Arizona.

The ex-CEO of TSMC stated a higher (+50%) cost of production than this number. Have to assume TSMC margins will be lower in the US. Seems protectionism will be re-introduced to protect US internal production, as recently hinted in a (Sec State Dept) Jake Sullivan speech. Geopolitics is going to have an extreme influence going forward. Throw out the old rules.

Very interesting & important trade policy speech soon affecting us all.

Remarks by National Security Advisor Jake Sullivan on Renewing American Economic Leadership at the Brookings Institution | The White House

AS DELIVERED I want to start by thanking all of you for indulging a National Security Advisor to discuss economics. As most of you know, Secretary Yellen gave an important speech just down the street last week on our economic policy with respect to China. Today I’d like to zoom out to our...

www.whitehouse.gov

"The first step is laying a new foundation at home—with a modern American industrial strategy."

"Finally, we are protecting our foundational technologies with a small yard and high fence."

 

[Exist50]

TSMC overseas foundry quotes to be 10-30% higher than in Taiwan

TSMC has begun to formulate pricing strategies for its new overseas wafer fabs. Quotes for advanced chips to be fabricated by its plant in Arizona are estimated to be 20-30% higher than corresponding prices in Taiwan, while mature process chips from its plant in Japan's Kumamoto could be 10-15%...

www.digitimes.com

TSMC is going to charge 20-30% more for chips fabbed in Arizona.

TSMC never wanted to build outside of Taiwan, but if governments are willing to throw billions in subsidies at them and pay higher wafer costs for domestic production, then they'll do it. But you see the games being played with their recent request for significantly more.

 

[Lodix]

Not so much. Samsung hasn’t been able to capture any well known ODM on the bleeding edge lately. The deal with Nvidia was fraught with problems and ended badly for Samsung's Logic division.

What are you talking about? It was a benefit for both.

 

[Ajay]

What are you talking about? It was a benefit for both.

So beneficial that not only did Nvidia switch back to TSMC, but they paid TSMC around $1.5B in advance to secure their wafer allocation.

 

[H433x0n]

The ex-CEO of TSMC stated a higher (+50%) cost of production than this number. Have to assume TSMC margins will be lower in the US. Seems protectionism will be re-introduced to protect US internal production, as recently hinted in a (Sec State Dept) Jake Sullivan speech. Geopolitics is going to have an extreme influence going forward. Throw out the old rules.

I'm not sure you're looking at it from all angles with this take.

Both TSMC and Samsung are essentially treated as part of the government by their respective nations (Samsung especially so). They're viewed as their national champion and their representative to the tech world. Samsung Foundries in particular has almost no obligation to turn a profit, their financials are rolled into other segments of Samsung and shielded from public scrutiny. It's ran almost entirely for developing the requisite manufacturing knowledge for the benefit of South Korea. For Taiwan, TSMC is the lifeblood of the entire country. It's viewed as more important and prestigious than their own military. Any young Taiwanese that is particularly gifted intellectually is pushed by society to join TSMC and contribute to Taiwan's success. Asianometry has a lot of excellent videos on the TSMC / Taiwan topic.

Intel is not treated by the United States the same way. Yes, we favor it of course but it's not our national identity. People joining Intel aren't looking to satisfy their patriotic duty to their country, it's just one of many large multi-national companies within our borders. We welcomed Samsung and TSMC to build fabs in our country and even subsidized parts of it. Their increased costs are due to regulations that are actually enforced (instead of handwaved away their government) and the differences in working culture from the West and Asia.

 

[Lodix]

Nvidia benefited incredibly from using Samsung 8nm. They had a less expensive node not too inferior to TSMC 7nm that could supply Nvidia all the volume they wanted in a time that almost everyone was short supplied and had to pay higher for a good position in the queue for TSMC.

But for the next generation for 2022, Nvidia wanted a sub 7nm node with good performance and yields. This talks happen years in advance, and at the time ( around 2020 ) SS yields for 7 and under were not great, and TSMC had better efficiency.

AMD with RNDA2 gave good competition and Nvidia wanted to not risk performance nor volume production at a time when almost everyone was supply constrained. So they went with TSMC and prepaid for wafers.

I don't think it is difficult to understand the situation. Nvidia and Samsung Foundry had record revenue during that period. I would not call that "fraught with problems".

 

[DisEnchantment]

• Part of the TSMC N2 technology platform, a backside power rail provides additional speed and density boost on top of the baseline technology.
  • The backside power rail is best suited for HPC products and will be available in the second half of 2025.
  • Improves speed by more than 10-12% from reducing IR drop and signal RC delays.
  • Reduces logic area by 10-15% from more routing resources on the front side.

TSMC 2023 North America Technology Symposium Overview Part 2 - Semiwiki

The next topic I would like to cover is an update to the TSMC process node roadmap starting with N3. As predicted, N3 will be the most successful node in the TSMC FinFET family. The first version of N3 went into production at the end of last year (Apple) and will roll out with other…

semiwiki.com

Interesting that backside power rail is bringing 10-12% speed improvement. N2 --> N2P going to be another good bump.

 

[Doug S]

Why do they say "the backside power rail is best suited for HPC products"? Aren't the days when mobile designs were significantly different than HPC (in terms of frequency, peak voltage, even chip size with chiplets quickly becoming the norm for HPC) behind us now? Sure there are a lot more amps being pushed into HPC designs, but they have a lot more pins so the power per pin isn't all that different.

Maybe I'm wrong but that statement sounds like something from 2010 when mobile SoCs were clocking at 1 GHz and HPC designs were 5 GHz. In the N2 era we will have mobile SoCs pushing 4 GHz and HPC will maybe be 6 GHz. They really aren't all that different anymore, especially with TSMC adding the ability to mix and match different cells so you no longer need to do a design that's all low power versus all high performance.

 

[naukkis]

Why do they say "the backside power rail is best suited for HPC products"? Aren't the days when mobile designs were significantly different than HPC (in terms of frequency, peak voltage, even chip size with chiplets quickly becoming the norm for HPC) behind us now? Sure there are a lot more amps being pushed into HPC designs, but they have a lot more pins so the power per pin isn't all that different.

It's not about pins but power routing in silicon itself. Routing power delivery under silicon and other metal layers on top of silicon makes it possible to have less power delivery losses, which only matters on very high clock frequencies.

 

[Doug S]

It's not about pins but power routing in silicon itself. Routing power delivery under silicon and other metal layers on top of silicon makes it possible to have less power delivery losses, which only matters on very high clock frequencies.

Matters at 6 GHz but not 4 GHz? Is it a square factor, i.e. F^2 so 6 GHz has double the loss of 4 GHz?

Or are they mainly counting on the fact that HPC will run flat out 24x7 while phones/laptops/PCs will run at max frequency a tiny fraction of their operating life, and has to do with the temperature of the silicon and wiring?

 

[A///]

my interpretation of the materials I've read is it comes down to signal integrity and resistance. the claims are huge on it alongside odm specific stuff like dlvr and I'd like to use the product before making any statement bad or grandiose about the products in question.

it all comes down to using less power to achieve the same goal, lower temps and more headroom. for now it's a promise of what's to come but until you can buy the damn product and use it and evaluate what it's like then all this discussion on the whims and prospects of the tech is useless to people like me who don't have the time and energy to invest in marketing claims by the odm until it's replicatable by the end consumer.

 

[FlameTail]

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Samsung catching up?