Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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[DisEnchantment]

Samsung showed a roadmap that completely skipped 3GAE.

It's highly doubtful that the process is close to ready for real mass production. Maybe sometime in '23, but right now it seems they're just starting risk production.

From last SAFE Forum in Oct 2021, they were talking to ecosystem customers/partners and said they will MP in 2022H1

Samsung is scheduled to start producing its customers’ first 3nm-based chip designs in the first half of 2022, while its second generation of 3nm is expected in 2023.

Samsung Foundry Innovations Power the Future of Big Data, AI/ML and Smart, Connected Devices

Details were disclosed at the company’s 5th Annual Samsung Foundry Forum

news.samsung.com

Also this in official April 2022 Earnings Report they reiterated MP in 1H2022



They did announce on the last day of 1H2022, and with smaller than expected gains, but reading between the lines it is now clear they can meet their disclosed numbers only with second gen 3GAP

On Yields it is clear they are trying to improve it, but they already stated 3GAE yields is as good as their 4LPE/P which does not say much but it is not worse at least.
Also they disclosed that they are working on improving the yields

 

[Exist50]

From last SAFE Forum in Oct 2021, they were talking to ecosystem customers/partners and said they will MP in 2022H1
View attachment 63813

Samsung Foundry Innovations Power the Future of Big Data, AI/ML and Smart, Connected Devices

Details were disclosed at the company’s 5th Annual Samsung Foundry Forum

news.samsung.com

Also this in official April 2022 Earnings Report they reiterated MP in 1H2022

View attachment 63812

They did announce on the last day of 1H2022, and with smaller than expected gains, but reading between the lines it is now clear they can meet their disclosed numbers only with second gen 3GAP

On Yields it is clear they are trying to improve it, but they already stated 3GAE yields is as good as their 4LPE/P which does not say much but it is not worse at least.
Also they disclosed that they are working on improving the yields
View attachment 63814

If they're actually mass producing a design now, it should be on the market within a few months, but the rumor mill is silent. Call me skeptical. Also, where did they state 3GAE yields were the same as 4LPE/P? Don't remember that.

 

[DisEnchantment]

If they're actually mass producing a design now, it should be on the market within a few months, but the rumor mill is silent. Call me skeptical. Also, where did they state 3GAE yields were the same as 4LPE/P? Don't remember that.

It is OK to be skeptical, but it is in their ER not some presentation to some media. Investors will ask about it in next ER in a month or so.

It is the link above.

In addition to power, performance and area (PPA) improvements, as its process maturity has increased, 3nm’s logic yield is approaching a similar level to the 4nm process, which is currently in mass production.

 

[Ajay]

Helloo ... this is GAA not FinFET. There is no HP or HD library.

David Kanter rebuffed that recently, saying that HD and HP libraries will continue under GAA process nodes. Sadly, I can't find the thread where he made that tweet.

 

[DisEnchantment]

David Kanter rebuffed that recently, saying that HD and HP libraries will continue under GAA process nodes. Sadly, I can't find the thread where he made that tweet.

I have seen this, but I am more inclined to the opinion like Andreas in the response to the tweet.

https://twitter.com/x/status/1541928129064669184

Definition of what is HP and HD from FinFET is no longer applicable for GAA.
You cannot compare GAA XTor to FinFET and say this is HD or this is HP

 

[maddie]

I have seen this, but I am more inclined to the opinion like Andreas in the response to the tweet.

https://twitter.com/x/status/1541928129064669184

Definition of what is HP and HD from FinFET is no longer applicable for GAA.
You cannot compare GAA XTor to FinFET and say this is HD or this is HP

I would think that capacitance and other circuitry interactions between adjacent transistors would affect the allowed layouts and so, while maybe not as extreme as FinFets, even these GAA constructs would benefit from specific libraries.

 

[DisEnchantment]

I would think that capacitance and other circuitry interactions between adjacent transistors would affect the allowed layouts and so, while maybe not as extreme as FinFets, even these GAA constructs would benefit from specific libraries.

Two transistors are separated with a Diffusion break, there are Single diffusion break or Double diffusion break. Capacitance is notorious for Metal layers and contacts

However I want to take a step back a bit, for FinFET, HP vs HD is mainly differentiated by fin and poly count, so 2x2 devices are smaller than 3x3 devices for sure. But GAA don't have that.
If you are totally changing the gate dimension, then it becomes a totally different process altogether or at least we can't call it same process.
And of course we are talking about transistor only, metal layers also influence the density of the final chip.

In the end, we cannot compare FinFET to GAA because they scale differently
And, if multiple permutations of standard cell dimensions are available and designer can use the similar design rules, the Fab could put them all in one PDK and call it same process I guess.

 

[Henry swagger]

https://twitter.com/x/status/1542485668311764992

✅

 

[Exist50]

It is OK to be skeptical, but it is in their ER not some presentation to some media. Investors will ask about it in next ER in a month or so.

It is the link above.

"is approaching", "similar", and "logic yield" in particular can cover quite a bit. Not to mention the poor state of 4nm as things are. Hopefully they do get real products out, but I don't think this announcement was particularly encouraging.

 

[DrMrLordX]

How is it not an internal node if they won't open the door to external customers until 3GAP?

I was under the impression that the announcement coincided with some risk production for external customers.

 

[randomhero]

https://videocardz.com/newz/nvidia-...-gen-rtx-40-gpus-5nm-wafers-amid-lower-demand

Well this is kind of interesting rumour. It makes sense for Apple and Nvidia, but AMD? They have such wide portfolio of products made on 6/7 nm and they are still in expansion in all markets and where they dominate, read consoles, there is still demand-undersupply.

 

[DrMrLordX]

https://videocardz.com/newz/nvidia-...-gen-rtx-40-gpus-5nm-wafers-amid-lower-demand

Well this is kind of interesting rumour. It makes sense for Apple and Nvidia, but AMD? They have such wide portfolio of products made on 6/7 nm and they are still in expansion in all markets and where they dominate, read consoles, there is still demand-undersupply.

AMD is also selling every Epyc they can get packaged and tested. Unless AMD agreed to this, it doesn't make a lot of sense.

 

[moinmoin]

https://videocardz.com/newz/nvidia-...-gen-rtx-40-gpus-5nm-wafers-amid-lower-demand

Well this is kind of interesting rumour. It makes sense for Apple and Nvidia, but AMD? They have such wide portfolio of products made on 6/7 nm and they are still in expansion in all markets and where they dominate, read consoles, there is still demand-undersupply.

Yeah, highly doubt AMD is actually ordering less in total. What may have happened is that some specific orders were moved around (especially with other customers reducing orders) and the rumor picked up only a part of that, thinking it's a reduction. But DigiTimes has been suspect with many of its "reports".

 

[MadRat]

Going from 5nm to a 3nm process is only 29% density increase? I thought it would be more drastic. That wall of cost:benefit for silicon has to be rapidly approaching.

 

[Ajay]

Two transistors are separated with a Diffusion break, there are Single diffusion break or Double diffusion break. Capacitance is notorious for Metal layers and contacts

However I want to take a step back a bit, for FinFET, HP vs HD is mainly differentiated by fin and poly count, so 2x2 devices are smaller than 3x3 devices for sure. But GAA don't have that.
If you are totally changing the gate dimension, then it becomes a totally different process altogether or at least we can't call it same process.
And of course we are talking about transistor only, metal layers also influence the density of the final chip.

In the end, we cannot compare FinFET to GAA because they scale differently
And, if multiple permutations of standard cell dimensions are available and designer can use the similar design rules, the Fab could put them all in one PDK and call it same process I guess.

I suppose the bolded is where my thinking differs. I expect, particularly with Gen1 GAAFET, that limited numbers of options will be available. Verifying 2x2 or 3x3 FinFETs parameters for HD and HP processes was already a lot of work (in man years). I don't see that kind of workload decreasing when it comes to verifying that a particular configuration will work (in terms of width, length, thickness and stack height the ribbons within the xtor). Hence the reason that we will only see HD & HP PDKs. Perhaps, at some point in time, enough knowledge, aided with simulators, will have been acquired to vary some of these parameters within the same PDK, at least in a stepwise fashion. Otherwise, I think we are expecting too much from FAB operators. Here, I am completely ignoring the capabilities of the tooling, particularly of maintaining dimensional stability as the stack height increases (more ribbons) across a large number of xtors - so that parametric electrostatics remain within the limits of acceptable deltas (a particular statistical Q-factor and Sigma limit).

 

[maddie]

https://videocardz.com/newz/nvidia-...-gen-rtx-40-gpus-5nm-wafers-amid-lower-demand

Well this is kind of interesting rumour. It makes sense for Apple and Nvidia, but AMD? They have such wide portfolio of products made on 6/7 nm and they are still in expansion in all markets and where they dominate, read consoles, there is still demand-undersupply.

As speculated. For us, recessionary price falls or stagflationary increases, that is the question. In both cases however, demand and production falls. Some of us have written about this exact scenario for a few weeks. Well, it appears to be here.

 

[nicalandia]

https://twitter.com/x/status/1542732724443938816

 

[moinmoin]

https://twitter.com/x/status/1542732724443938816

Those are the tweets VideoCardz's article relied on discussed a couple posts further upward.

 

[igor_kavinski]

Going from 5nm to a 3nm process is only 29% density increase? I thought it would be more drastic. That wall of cost:benefit for silicon has to be rapidly approaching.

Future chips are going to look really weird due to cache density not increasing as well as logic density. They will have a huge (like 80% of die area) blob of SRAM in the middle surrounded by teensy weensy chiplets for CPU, GPU and I/O.

 

[nicalandia]

Those are the tweets VideoCardz's article relied on discussed a couple posts further upward.

台積電傳3大客戶齊調訂單　半導體市況雪上加霜

台積電罕見出現3大客戶調整訂單，7月中法說會下修全年營收目標雜音已湧現，同時也使得瀰漫悲觀氛圍的半導體市況雪上加霜。

www.digitimes.com.tw

 

[moinmoin]

@nicalandia you are supposed to add your own text to any links and images you post. Or were you taken over by a bot?

 

[Saylick]

Here, I'll just post the Google Translation for everyone. Highlights are mine for emphasis. Words in brackets (e.g. [ ]) are clarifications on my end.

It is rare for TSMC to adjust orders from three major customers. In July, China and France said that they would revise their annual revenue targets. The noise has emerged, and at the same time, it has also made the pessimistic semiconductor market situation worse.

The global economy has taken a sharp turn for the worse. The demand for many consumer electronics such as TVs, mobile phones and NBs has fallen faster than expected. Inventories in the semiconductor and electronic supply chains have risen rapidly, and price declines and order cuts have spread rapidly. Seeing the loosening, the OEM quotations went up against the trend.

According to semiconductor industry sources, TSMC has been hit by air raids recently. In addition to Apple's new iPhone target shipments falling by 10%, it is also reported that due to the freezing PC market conditions, major customer AMD has also cut 7/6 nanometers. The process order is about 20,000 pieces [wafers]. And NVIDIA, which has been fully returned by Samsung Electronics, has subsided due to the mining boom, and it is also reported that NVIDIA hopes to delay the purchase of goods by one season.

The demand for terminal consumer electronics has begun to cool down in the second quarter. Under the impact of high inventory and low demand, not only the driver IC industry, which has faced the dilemma of falling prices and volume in recent months, has to adjust its foundry orders. Due to the inventory pull alert, the news of the suspension of the supply chain pull until the end of July was suddenly released.

The market is generally pessimistic that the market situation will continue to deteriorate in the second half of the year, and the chain effect of destocking and order cutting will break through the upstream confidence defense line of semiconductors. Advantages, not affected by the sharp drop in demand, and the 22/28nm mainstream process is still in demand, the production capacity of other mature processes has been loosened.

However, the supply and demand reversal is worse than expected. The latest market news has been that if there is a large number of orders cut, it will be more difficult to obtain TSMC's production capacity in the future. Considering that the chip industry has not seen the order cut, but recently TSMC has been suddenly hit by 3 Major customers adjusted their orders, causing a great shock to the market.

It is understood that the mass production of Apple's iPhone 14 series has started, but the target shipment of the first wave of 90 million units has been reduced by 10%. In addition, both Supermicro [AMD] and NVIDIA are also affected by the sharp drop in PC market conditions and the subsidence of the mining boom. Faced with the impact of customers cutting orders to reduce inventory, they have no choice but to tell TSMC that they have to adjust their order plans. Among them, AMD has revised down its orders of about 20,000 7/6nm wafers from the fourth quarter to the first quarter of 2023.

In addition, NVIDIA has paid a huge amount of prepayment to obtain more process capacity below 5nm since Samsung’s 8nm return to TSMC. However, the decline of the mining boom came quickly and quickly, and the terminal channel and graphics card manufacturers were full of stocks. The large number of second-hand cards released to the market, and the less-than-expected demand for gaming PCs, forced NVIDIA to adjust its plans and indicated to TSMC that it would delay and reduce the first wave of orders.

The alarm of major customers adjusting orders is loud. However, semiconductor companies believe that Apple’s revision of iPhone 14 series orders should be in TSMC’s expectations. It has a conservative outlook on smartphones, so this variable should be included in financial estimates.

In addition, although AMD has reduced orders for 7/6nm by about 20,000 pieces, its 5nm PC and server orders have not been revised, and they are willing to accept price increases. Therefore, TSMC has little response to this.

NVIDIA wants to cut orders, but TSMC is unwilling to make concessions. At present, the adoption of the 5nm next-generation RTX 40 series can delay the delivery of goods for one season, or even to the first quarter of 2023, but NVIDIA is responsible for finding other vacated capacity. Customers take over to make up, minimizing the impact.

Semiconductor industry players said that due to the weakening market conditions, TSMC's three major customers adjusted their orders together, and the market may also begin to see the peak season in the third quarter.

I am more worried that it will make the pessimistic semiconductor market situation worse. Even TSMC can’t keep up, and there may be more noise in the upstream and downstream supply chains. The price and volume have been rising all the time. Silicon wafers with long-term protection Industry will be the focus of the next wave.

It is also worth noting that due to the frozen terminal demand, prolonged equipment delivery and lack of labor, it is also reported that TSMC's new Kaohsiung 7/28nm plant, which was expected to mass-produce in 2024, will be postponed to the end of 2024 and mass production in 2025. . The semiconductor industry believes that the delay in production expansion is good news for foundry. Waiting for the completion of the destocking of upstream and downstream inventories, new production capacity can be opened one after another, which can reduce the risk of overcapacity.

TSMC's revenue in the first quarter soared. It is estimated that the revenue in the second quarter will be about 17.6 billion to 18.2 billion US dollars, with a quarterly increase of about 3.5%. Calculated at the exchange rate of NT$28.8 to US$1, the estimated gross profit margin is 56~58% , the profit rate is 45~47%. The financial forecast for the second quarter is higher than that of the first quarter, and the annual revenue will grow by about 30%.

Chairman Liu Deyin said in June that the demand for consumer electronics such as mobile phones and PCs is indeed weak recently, but for TSMC, the demand for automotive and HPC is quite stable, and even some exceed the supply capacity. TSMC is also just adjusting its product mix. Look, the full-year production capacity in 2022 is still fully loaded.

In addition, the rising inventory level in the supply chain is the current situation and will improve in the future. TSMC is quite confident in its operating performance in 2022. The long-term outlook for the next five and 10 years is also optimistic. At present, global inflation is continuing, but it should be gradually eased. Down, there is no direct impact on the semiconductor and technology industries at present, but the long-term impact needs to be observed continuously.

 

[Doug S]

Semiconductors have always had boom/bust cycles. After a big boom with shortages across the board and TSMC raising prices, it was inevitable a big bust would follow. No one should be surprised, and TSMC has seen it many times and was expecting it would arrive eventually.

Hopefully the same order cuts will start to happen in older nodes so we can finally cure the chip shortages affecting industries worldwide. Then we only have to worry about the shipping delays (easing slightly in Asia but getting even worse in Europe so no end in sight there) and raw material inflation (that should get better as overall demand drops)

 

[moinmoin]

I'm not seeing any unexpected bust. We all were expecting mining to implode, that's overdue really. And that the PC market would recede again was to be expected as well after the previous pandemic induced peak that was against all trends.

I'm honestly rather irritated that stock market seems to conclude that all areas of computing and all kinds of semi companies are equally affected by this. (And that appears to be the same line DigiTimes seems to take, jumping on a popular bandwagon there.) But it's not the first time that it sheepishly lumps together smaller independent trends into one seeming macro trend.

Shipping delays are the real problem indeed.

 

[IntelUser2000]

Future chips are going to look really weird due to cache density not increasing as well as logic density. They will have a huge (like 80% of die area) blob of SRAM in the middle surrounded by teensy weensy chiplets for CPU, GPU and I/O.

It looks worse for Samsung because they are calling derivatives and half nodes as full nodes. That's how they are getting their numbers so low.

Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.

According to Samsung, their 4nm results in 11% perf increase, 24% area reduction, and 16% power reduction compared to their 5nm.

Samsung 3GAE vs 4nm = +11% perf, 11% larger area, 35% power reduction.
Samsung 3GAP vs 4nm = +17% perf, 15% reduction in area, 41% power reduction

Remember at a product-level TSMC 4nm was about 7% faster and offered 23% higher perf/watt while the GPU was about 10% faster and offered 47% higher perf/watt and we're talking device level power consumption.

I think TSMC N4 is enough to compete with the second-generation 3GAP in all areas.

Also based on yields of previous nodes 3GAE is probably terrible as in 10-20% yield.

Shipping delays are the real problem indeed.

It will be in ALL areas not just all semi because of the shipping delays/forced lockdowns etc. Look how much building material pricing has increased, or the cost of food. Don't forget about housing and gas!