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Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

DisEnchantment

Golden Member
TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

1587737990547.png
N7 performance is more or less understood.
1587739093721.png

This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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1587739615344.png

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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Claudiovict said:
Samsung 1nm ~2031
Wonder what will come after they reach the limit of the silicon
wccftech.com

Samsung To Reportedly Introduce Its 1nm Process By 2031 By Adopting ‘Fork Sheet’ Technology To Pack More Transistors Within The Same Chip Area

The next-generation 1nm process from Samsung is expected to launch sometime in 2031, with the Korean giant using a new method to increase transistor count
wccftech.com wccftech.com
Click to expand...
Isn't their 1.4nm delayed to 2029? They are making 1nm in 2 Years after that.
 
511 said:
I don't think I can call 4-5% sizable chunk faster according to TSMC themselves.

View attachment 141041
You can see in the slides clearly A14 is not much improvement over A16. A16 reference is N2P and A14 is base N2 and here is N2P slide
Click to expand...


A16 is using BSPDN, while the A14 they are comparing with N2 almost certainly is not. Using an A16 w/BSPDN vs N2P and A14 vs N2 comparison to extrapolate A16 vs A14 isn't apples and apples.
 
Doug S said:
A16 is using BSPDN, while the A14 they are comparing with N2 almost certainly is not. Using an A16 w/BSPDN vs N2P and A14 vs N2 comparison to extrapolate A16 vs A14 isn't apples and apples.
Click to expand...
It is ? Cause in the end they are getting compared from the Same N3E Baseline.
 
511 said:
It is ? Cause in the end they are getting compared from the Same N3E Baseline.
Click to expand...

My point is that TSMC doesn't say "which" A14 is being compared there, which matters since it will be offered in both non-BSPDN and BSPDN flavors, sort of like how N2P is offered in non-BSPDN flavors (where it is called N2P) and BSPDN flavor (where it is called A16)

There may not even be a "A14" with BSPDN, if they decide to call that A12 to differentiate it like they did with A16.

So you can't do like @jdubs03 did and "set the baseline to N3E" and claim almost no difference between A16 and A14. Because A16 is getting the BSPDN bump, and the A14 numbers shown in those comparisons are almost 100% for sure not.

If we want a representative comparison we have to compare N2P with A14 - that's the bump we'd get over A16 if we used A14 with BSPDN for a fair comparison with A16. We don't have N2P vs A14 numbers, the ones shown were N2 vs A14, but we can subtract out the N2 vs N2P uplift to extrapolate N2P vs A14 - about 5-10% speed improvement or 15-20% power reduction, 5-8% density gain.
 
Doug S said:
My point is that TSMC doesn't say "which" A14 is being compared there, which matters since it will be offered in both non-BSPDN and BSPDN flavors, sort of like how N2P is offered in non-BSPDN flavors (where it is called N2P) and BSPDN flavor (where it is called A16)
Click to expand...
The standard one aka the base node it's been always like that
Doug S said:
There may not even be a "A14" with BSPDN, if they decide to call that A12 to differentiate it like they did with A16.
Click to expand...
There is but that's not the point of comparison.
Doug S said:
So you can't do like @jdubs03 did and "set the baseline to N3E" and claim almost no difference between A16 and A14. Because A16 is getting the BSPDN bump, and the A14 numbers shown in those comparisons are almost 100% for sure not.

If we want a representative comparison we have to compare N2P with A14 - that's the bump we'd get over A16 if we used A14 with BSPDN for a fair comparison with A16. We don't have N2P vs A14 numbers, the ones shown were N2 vs A14, but we can subtract out the N2 vs N2P uplift to extrapolate N2P vs A14 - about 5-10% speed improvement or 15-20% power reduction, 5-8% density gain.
Click to expand...
We have all the data points to make it
 
A14 is 7.2% higher in performance than N2P, while A16 is 8% higher than N2P.
The A14 have changed, initially tsmc said performance +10% and logic +23%, now performance +15% and logic +20%. It is unclear how the 23% logic increase of A14 can be converted into a 20% chip density increase, as a comparison, N3 logic increased by 60% and chip density by 30%. Perhaps the calculation formula was changed.
 
Doug S said:
A16 is using BSPDN, while the A14 they are comparing with N2 almost certainly is not. Using an A16 w/BSPDN vs N2P and A14 vs N2 comparison to extrapolate A16 vs A14 isn't apples and apples.
Click to expand...

Is that the case? A14 without BSPDN in those slides?
 
jdubs03 said:
Pretty sure that’s A10..
Click to expand...

No, A10 is another full node. If there is a different name for A14+BSPDN like there was for N2P+BSPDN it'll be A12.

Half nodes are things like N3P. Yes that's a very small gain but optical shrinks used to get much bigger gains back in the days when full nodes were much bigger gains. Don't like it, blame Moore for his wimpy law that only lasted 50 years or so.
 
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According to a report from Hankyung Korea Market, at CES 2026, Qualcomm’s CEO Cristiano Amon met with reporters and discussed the company’s collaboration with Samsung Foundry on 2nm chips.
He said, “Among many foundry companies, we have started discussions with Samsung Electronics for contract manufacturing using the latest 2-nanometer process. We have also completed the design work with the goal of commercialisation soon.”
The report doesn't say exactly which chip Qualcomm is planning to get made from Samsung

www.sammobile.com

Samsung may make Qualcomm's next 2nm high-end chip

At CES 2026, Qualcomm's CEO reportedly revealed that the company is planning to get 2nm chips made from Samsung Foundry.
www.sammobile.com
 
Intel has a special talent to find this stuff:
Intel is proud to join the Terafab project with @SpaceX, @xAI, and @Tesla to help refactor silicon fab technology.

Our ability to design, fabricate, and package ultra-high-performance chips at scale will help accelerate Terafab’s aim to produce 1 TW/year of compute to power future advances in AI and robotics.

It was fun hosting @elonmusk at Intel this past weekend!
Click to expand...
Source
 
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