Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[511]

https://twitter.com/x/status/1966248560212471883

 

[igor_kavinski]

TBH, things seem ok till 5nm. It gets pretty expensive after that.

So 14nm wafer should cost half of 10nm approx. which somewhat explains why Intel has Comet Lake out in 2025. Desperate to save pennies.

 

[DavidC1]

TBH, things seem ok till 5nm. It gets pretty expensive after that.

So 14nm wafer should cost half of 10nm approx. which somewhat explains why Intel has Comet Lake out in 2025. Desperate to save pennies.

Except for the smallest feature sizes, the realistic limit in scaling is roughly 10nm. Hence, the price skyrockets after 20nm because transistor architecture has to change to fit the 10nm limit.

High-K dielectric: Previously it was 1nm, and that was few atoms thick. Therefore it used High-K to have the same electric properties but with 3nm thickness, reducing leakage greatly
FinFET: Limited by gate scaling, so they surrounded three sides of Drain-Source with Gates, which means they can keep the same size but better performance
GAA: Extension of the above

Hence why in the GAA era the scaling collapses, because there are no workarounds anymore. There are other ways to achieve greater density such as stacking but that comes with big tradeoffs and it isn't really a reduction in size.

 

[marees]

Vlad 02 September 2025
Samsung Android Rumors

Samsung's Exynos 2600 chipset will be the world's first mobile SoC made using a 2nm process, that much the company has already confirmed. We've seen it improving its scores in Geekbench a few days ago, and now a new report from Samsung's home of Korea claims the chip is ready for mass production

Source (in Korean)

Samsung's 2nm Exynos 2600 chipset is ready for mass production

We might see it in the Galaxy S26 family next year. Samsung's Exynos 2600 chipset will be the world's first mobile SoC made using a 2nm process, that much...

www.gsmarena.com

https://twitter.com/x/status/1967178830252314896

 

[511]

https://twitter.com/x/status/1967017049802387854

Big LOL and Synopsys biggest Customer is Intel.

 

[igor_kavinski]

How can Intel do that without any repercussions? The contract wasn't signed yet or they had an exit clause favoring them only?

 

[511]

How can Intel do that without any repercussions? The contract wasn't signed yet or they had an exit clause favoring them only?

Intel is the biggest Synopsys Customer and 10% revenue fo Synopsys is from Intel. This was LBTs doing he is diversifying to Cadence as cadence legend.

 

[regen1]

https://twitter.com/x/status/1967017049802387854

Big LOL and Synopsys biggest Customer is Intel.

Well, this is not necessarily the flex the Intel X/Reddit StockBros fanboying LBT think it is.
Now there's a lot of hypothesis going on but if dishonoring contract(s) with the no.1 EDA company with which you have had a very long term relationship when you already have gathered bad reputations(whether rightly or not) is not exactly great.
And yeah it garners more suspicion towards LBT's Cadence and other investor politics(whether warranted or not)

People like Glenn Hinton and others left citing the more time at office policy. Some of these policies are beyond stupid.

https://www.reuters.com/world/china/cadence-plead-guilty-pay-140-million-us-china-sales-2025-07-28/

Chip startup alleges Cadence sabotaged processor rollout

Tachyum blames deep conflicts of interest as source of Prodigy delays

www.theregister.com

This case was settled later in 2023 with Cadence paying an undisclosed amount. These conflicts of interests and long operational oversights aren't a great outlook for LBT.

 

[511]

Glenn Hinton is too old tbh he has contributed enough he should really enjoy his retirement

 

[igor_kavinski]

Maybe they need to pay Qualcomm to let Gerard Williams III work part-time for Intel.

And his only job should be to shout: WTF???? That's not how you do it!

Maybe that will make them learn how not to do it.

 

[511]

Maybe they need to pay Qualcomm to let Gerard Williams III work part-time for Intel.

And his only job should be to shout: WTF???? That's not how you do it!

Maybe that will make them learn how not to do it.

His expertise is with ARM the first thing he will try to do is make an ARM Chip not x86.

 

[regen1]

Glenn Hinton is too old tbh he has contributed enough he should really enjoy his retirement

RTO mandates and more shifts/hours at office policy drive away other talented guy as well not just older people. Anyway you had a good engineer working for you now you don't, just one of many gone.
These policies are just a way to drive away or reduce employees and even make it unattractive to join Intel.
Intel hasn't been having great stock options/RSUs to attract its employees. It could at least try giving them better flexibility otherwise more guys drain out to Nvidia, Synopsys , etc.

 

[511]

RTO mandates and more shifts/hours at office policy drive away other talented guy as well not just older people. Anyway you had a good engineer working for you now you don't, just one of many gone.
These policies are just a way to drive away or reduce employees and even make it unattractive to join Intel.
Intel hasn't been having great stock options/RSUs to attract its employees. It could at least try giving them better flexibility otherwise more guys drain out to Nvidia, Synopsys , etc.

I am not a big fan of RTO Myself the best way should be Hybrid imo

 

[marees]

TSMC's back-side power supply A16 is coming soon, and Nvidia is expected to be the first to adopt it despite the high price.​

Entering a golden period of growth, mass production will begin in the second half of next year, and Nvidia is considering introducing​

TSMC's A16, which will go into mass production in the second half of next year, will be a significant turning point in TSMC's most advanced manufacturing processes, with AI applications dominating the industry for the first time.

Facing competition, supply chain sources indicate that Nvidia is considering adopting TSMC's most advanced process, the A16 (with a back-end powered 2nm process), which will be mass-produced in the second half of next year.


Semiconductor industry analysts say that although 2nm is expensive, with Apple's 2nm chip costing nearly $27,000 each and Nvidia's back-of-chip power supply version costing more than $30,000, the significant increase in performance and chip density makes it the key reason for many customers to "pay for value."

Analysts believe that to ensure the yield of more refined processes, demand for testing and verification will increase, including SLT (system-level testing), AOI (automated optical inspection), and burn-in testing. Previously used primarily for production line monitoring, AOI will be integrated deeper into the wafer manufacturing process, achieving inspection accuracy levels beyond the reach of the naked eye. This will drive demand for related testing equipment, such as those from companies like Maktec and Huayouyi.

台積電晶背供電A16來襲 輝達不畏價高有望率先採用

台積電迎來AI成長黃金期！隨2奈米製程進入量產，成長動能將由HPC貢獻。業者認為，2026年除手機大廠將使用台積電2奈米外，AMD以2奈米打造的HPC（高效能運算）晶片也將於明年登場；面對競爭，供應鏈消息直指輝達已考慮導入最先進製程，也就是台積電明年下半年量產的A16（擁有晶背供電版本的2奈米製程）...

www-ctee-com-tw.translate.goog

 

[Gideon]

Hmm what is this about then?

https://twitter.com/x/status/1967806574422020287

Well then I think the HD cell on base Intel 18A absolutely sucks…No wonder why Qualcomm and Broadcom quit on that node.

 

[adroc_thurston]

Hmm what is this about then?

18A sucks.
Duh.

 

[branch_suggestion]

18A sucks.
Duh.

Backside power in general seems to be a dud so far.

 

[adroc_thurston]

Backside power in general seems to be a dud so far.

Yeah everyone's but Intel stashed it till the foreseeable future. Fun.

 

[511]

Hmm what is this about then?

https://twitter.com/x/status/1967806574422020287

Intel 18A node ain't suited for Denser design or mobile use cased besides Intel's bread and butter HPC xtor.

 

[511]

Yeah everyone's but Intel stashed it till the foreseeable future. Fun.

They cut cost with their BSPDN Implementation so for them it's a net benefit

 

[adroc_thurston]

Intel 18A node ain't suited for Denser design or mobile use cased besides Intel's bread and butter HPC xtor.

It's not suited for Intel designs either given the yield.

They cut cost with their BSPDN Implementation so for them it's a net benefit

They also smashed their yields into bits with it.
10nm never taught them anything I guess.

 

[511]

It's not suited for Intel designs either given the yield.

Yields are fine don't know where you get your info they are fine at this stage not spectacular but not that bad.

They also smashed their yields into bits with it.
10nm never taught them anything I guess.

If it didn't they wouldn't have derisked I3 with I4 and 18A with 20A and outsourcing to TSMC?

 

[igor_kavinski]

Yeah everyone's but Intel stashed it till the foreseeable future. Fun.

It will force Intel to look for innovative ways to remove that concentrated heat so they will end up doing some useful work in that regard for the rest of the industry.

When do you think we will see coolers on the backside of the mobo to increase the surface area of heat dissipation?

 

[igor_kavinski]

If it didn't they wouldn't have derisked I3 with I4 and 18A with 20A and outsourcing to TSMC?

They learned to do that from Jim Keller. They seem to be incapable of learning on their own.

 

[adroc_thurston]

Yields are fine

Famous last words.

If it didn't they wouldn't have derisked I3 with I4 and 18A with 20A and outsourcing to TSMC?

They didn't derisk it anywhere near enough, which is why 20A did that magical vanishing trick.

They learned to do that from Jim Keller. They seem to be incapable of learning on their own.

That's whatever.