Ivy Bridge OC Results Came in (Engineering Sample)

[TidusZ]

That guys testing wasn't exactly idontcare quality stuff, I would wait for more reports or more detailed and competent testing before drawing any conclusions (even conclusions about the engineering sample, let alone retail).

 

[AdamK47]

ES sample is weird and thus hot

Weirdness always results in hotness. I mean, look at me. Hotness.

 

[Khato]

It took 'em long enough, but at the end of page five (post #123) a relevant question was answered - when the CPU was reporting 105C the heatsink was not hot to the touch. As Idontcare detailed earlier, a smaller chip with the same power consumption will result in higher temperatures due to thermal resistance. Given that IVB 'die shot' has CPU core size reducing by approximately a third compared to SNB, the core-IHS thermal resistance should increase roughly 1.5X. The question is then how much of the temperature rise on overclocked SNB temperatures is due to the interface thermal resistance. If say 40C of a 50C rise on an overclocked SNB is due to the interface thermal resistance, then at same power IVB would see something like a 70C rise. I doubt that the number is anywhere near that high, but it also gives a likely explanation for the high temperatures - it could well be a bad ES that doesn't have a proper core-IHS thermal interface.

 

[RichUK]

When is Ivy due to be released?

EDIT: Never mind, I've just seen another thread showing the release date as 29th April.

 

[BallaTheFeared]

Is it possible core temp isn't reading the temps correctly?

Also it looks like me managed to prime95 @ 5GHz with less than 1.4v, that's better than the avg SB.

 

[Idontcare]

Is it possible core temp isn't reading the temps correctly?

Also it looks like me managed to prime95 @ 5GHz with less than 1.4v, that's better than the avg SB.

Definitely.

When I got my 2600K it had been out for some 7-8 months already and yet coretemp was still borked for my sandybridge. So I used realtemp, which wasn't borked.

I think coretemp has since been fixed for sandy bridge, speedfan has not (reads way to low), but it is possible/likely that coretemp is not functioning right for ivy bridge.

With early chips like this they really ought to use realtemp and only report the distance to TJmax.

 

[TidusZ]

It would be nice if that guy was willing to do more detailed testing and experimentation. If you are going to break NDA you may as well go all out. Would be good if he checked the temperature of the heatsink base on the SB versus IB to see if contact between processor and heatsink is an issue. Maybe splurge on a $60 heatsink. Maybe do enough testing to make a graph (temperature at various voltage, etc) instead of just a superpi result and screenshots that are borderline unreadable.

 

[podspi]

Temperature is proportional to the die area and the power usage.

A 100W chip with 10mm^2 die is going to have much much higher temperature than a 100W chip with 100mm^2 die.

So IB, being much smaller than SB, is going to have higher temperatures at every point on the power-consumption curve regardless the underlying process technology.

Aren't we thermally limited with regards to clock speed for most modern designs nowadays, anyway? If so, this isn't great news for OCing...

 

[Idontcare]

It would be nice if that guy was willing to do more detailed testing and experimentation. If you are going to break NDA you may as well go all out. Would be good if he checked the temperature of the heatsink base on the SB versus IB to see if contact between processor and heatsink is an issue. Maybe splurge on a $60 heatsink. Maybe do enough testing to make a graph (temperature at various voltage, etc) instead of just a superpi result and screenshots that are borderline unreadable.

In all things in life you will find a rather direct correlation exists between the individual who is willing to be short-sighted and break their NDA for today's gains at the expense of losing tomorrow's opportunities and the quality of work and attention to detail that such an individual applies to their craft.

I'm not surprised at all that some dude who couldn't care less about their NDA is also the same kind of dude who can't pull together a halfway decent set of test results. The mentality involved kinda goes hand in hand.

You want high quality results then you have to wait for an individual who does high quality work to publish their results, and that sort of individual is not likely to also be the sort of person who puts it up early for some short-lived internet glory IMO.

 

[Idontcare]

Aren't we thermally limited with regards to clock speed for most modern designs nowadays, anyway? If so, this isn't great news for OCing...

Not thermally limited. It all comes down to design goals, which always comes down to $$$.

We are $$$ limited, or better said as we have placed our priorities such that we optimize today's microprocessor designs for metrics that tend to result in thermally limited designs. But that is not to say we are not the one's making that choice.

Physics limits us, to be sure, but we limit ourselves first and foremost when we decide how to setup our R&D budgets and design objectives.

 

[bunnyfubbles]

well, if its true and IB turns out to be an overclocking dud it'll mean 3930K for me

 

[Don Karnage]

Sad day when were complaining about 5ghz results.

 

[Arachnotronic]

Don Karnage, have you gotten your 2687W yet?

 

[T_Yamamoto]

Sad day when were complaining about 5ghz results.

i know, im still on a 90nm chip so you guys cant be crying

 

[T_Yamamoto]

Don Karnage, have you gotten your 2687W yet?

inb4infraction/ban

 

[Khato]

Is it possible core temp isn't reading the temps correctly?

Actually, there's one piece of evidence that it is reading the temperature pretty much correctly. Namely, what does a SNB running at 4.8GHz get for Linpack GFlops when running the IntelBurnTest? I know mine at stock 3.7GHz averages 84 GFlops, and one result I found at 4.6GHz shows around 115 GFlops... Yet this IVB ES starts at 101 GFlops and then decreases to around 94 GFlops when it's supposedly running at 4.8GHz? Certainly sounds like the thermal safeguards have tripped and it's not running at speed.

 

[bradley]

Enthusiasts are getting even better at hype than Intel and AMD's marketing teams. Based on preliminary benches, I am disappoint and will likely enjoy my 2500K and 2600K for quite a while. Though I'm still waiting for official silicon before making any real judgements.

 

[Don Karnage]

Don Karnage, have you gotten your 2687W yet?

Got it friday and haven't had a chance to install due to a lack of days off this week. Tomorrow or tuesday is looking like test day

 

[Idontcare]

Actually, there's one piece of evidence that it is reading the temperature pretty much correctly. Namely, what does a SNB running at 4.8GHz get for Linpack GFlops when running the IntelBurnTest? I know mine at stock 3.7GHz averages 84 GFlops, and one result I found at 4.6GHz shows around 115 GFlops... Yet this IVB ES starts at 101 GFlops and then decreases to around 94 GFlops when it's supposedly running at 4.8GHz? Certainly sounds like the thermal safeguards have tripped and it's not running at speed.

Either thermal safeguards or ECC from too low Vcc. He should be getting much higher GFlops for an IB. Just more proof that his results are likely irrelevant and should be discarded.

 

[epidemis]

Temperature is proportional to the die area and the power usage.

A 100W chip with 10mm^2 die is going to have much much higher temperature than a 100W chip with 100mm^2 die.

So IB, being much smaller than SB, is going to have higher temperatures at every point on the power-consumption curve regardless the underlying process technology.

How can this be true if it is in contact with a heat sink?

 

[bunnyfubbles]

Sad day when were complaining about 5ghz results.

I was never one to believe any of the ridiculously high hopes of something absurdly high like 6GHz, however based strictly on past ramping of clockrate over the previous generations for average higher end overclocks, something like 5.2GHz-5.3GHz isn't an unreasonable average to expect from high end air or closed loop water...but maybe we are at some sort of limitation crossroads, these results suggest Ivy is hardly better than what I already have with Sandy, and can't help but hope something is flawed either with user error and/or the chip being an engineering sample.

5GHz Ivy would be great for anyone buying new system for the first time in a few years, but not for those of us who update on a regular basis and already have a 2500K/2600K.

 

[Khato]

How can this be true if it is in contact with a heat sink?

Because depending upon how you count, there are about 7 different components of thermal conductivity to account for before you get to the heatsink fin that actually dissipates all heat to the surrounding air.

1. The silicon itself. All heat generating circuitry is on the bottom and has to travel through something like 1mm of silicon. Thermal conductivity of silicon is 149 W/m*K, aka it'd take 149kW of thermal energy to cause a 1C temperature difference across 1mm. So it's a quite trivial value in terms of temperature increase for the thermal power we're talking about. However, it still needs to be taken into account because of the fact that it's the first place where localized power output is spread to a larger area (why a single-threaded load attached to a particular core causes temperature rise in the others.)

2. Silicon -> IHS interface. Thermal conductivity for thermal grease ranges from 0.5 W/m*K for cheapo stuff up to around 9 W/m*K for something like AS5. (The Maingear Epic T100 TIM advertises 20 W/m*K.) Who knows what exactly Intel uses, but I doubt it's on either extreme given that this is by far the most important thermal interface due to the small size. If you go with a 0.025mm thermal gap (no idea whether it'd be larger or smaller than this) and a 2.5 W/m*K thermal compound, on a 160 mm^2 IVB die you'd end up with 15 W/K, aka at 150 watts you'd see a 10C temperature rise across this interface. (Yes, it's a simplistic way of calculating it, but gets the point across. Also, my guess is that an issue with this interface in that particular ES could be the cause for the abnormally high temperatures reported.)

3. IHS. Same as silicon, but copper is at 409 W/m*K, so again its a minimal effect upon temperature rise while having a far greater effect upon increasing the effective surface area for the next thermal interface. If you wanted to, you could then include the mechanics of the zinc coating on top of the copper.

4. IHS -> Heatsink interface. Same as the silicon -> IHS, and most likely the greater surface area would offset the increased gap distance. So again a 10C temperature rise could be expected.

5+ Once to the heatsink doesn't mean that there aren't further sources of resistance. As direct heatpipe contact designs have shown, there's thermal resistance to be found in something so simple as heatpipes running through a copper block that has the initial contact to the heat source.

 

[Grooveriding]

I'm sure we will see more instances turning up before IB is released of people with chips and their OC/temp results.

If in those instances we see repeated examples of very high temperatures with overclocking, safe bet these chips are hosed for OC. If not, this is just some dude who forgot to put some TIM on the chip

 

[Absolute0]

I asked him specifically about mounting and I am sure he has it fine. CoreTemp could be wrong, or the ES cpu could just be abnormal. Anyway, I can only be thankful that he chose to share his results... As he certainly didn't have to.

The testing is far from conclusive but I thought I'd post it because it's better than nothing.

Unfortunately the results make sense on a few different levels. This could explain why AT reviewed the 3770K days ago, but didn't do any OC results?! Why Intel delayed the IB mobile lineup?! Why the other OC screens leaked a little while ago ran a 1M at 5 Ghz and quit there?
If these things were benchable @ 5.3-5.5 Ghz as has been speculated, we should have seen it by now...

Sad cuz I can bench 3dmark @ 5.2 Ghz without breaking 1.5v! Was hoping IB could at least do 5.2 Ghz stable on water with some lower volts like 1.35 or something

But i'll still cross my fingers that retail CPUs are better.

 

[Idontcare]

I asked him specifically about mounting and I am sure he has it fine. CoreTemp could be wrong, or the ES cpu could just be abnormal. Anyway, I can only be thankful that he chose to share his results... As he certainly didn't have to.

The testing is far from conclusive but I thought I'd post it because it's better than nothing.

Unfortunately the results make sense on a few different levels. This could explain why AT reviewed the 3770K days ago, but didn't do any OC results?! Why Intel delayed the IB mobile lineup?! Why the other OC screens leaked a little while ago ran a 1M at 5 Ghz and quit there?
If these things were benchable @ 5.3-5.5 Ghz as has been speculated, we should have seen it by now...

Sad cuz I can bench 3dmark @ 5.2 Ghz without breaking 1.5v! Was hoping IB could at least do 5.2 Ghz stable on water with some lower volts like 1.35 or something

But i'll still cross my fingers that retail CPUs are better.

Well, they are delayed for some reason, and we all know how it turned out when AMD delayed bulldozer. Will it be all that surprising if we find out these things are temperature limited in clockspeed?

The downward TDP shift alone tells us something is afoot. It may well turn out that if IB hits its TDP of 77W then it is also darn near hitting its TJmax for whatever stock heatsink they intend on shipping it with.