Itanium - any ideas?

[metroplex]

There's a new grad course being offered at my university that deals with the Itanium Architecture. It's being taught by a former Intel person - a real swell guy.

Do you think I should take it?

Is the Itanium interesting? Or is it going to be uber-hardwork with nothing to show for at the end?

 

[smadavid]

Take it! Sounds like lots of fun. What I've read of IA64, the architecture sounds very intersting, and to learn from an Intel guy would be fun too.

 

[dszd0g]

Sounds interesting. What are the alternatives? I don't see that class as helping get a job or really helping that much in industry unless you go work for Intel.

I am really curious how the Itanium patent lawsuit will end up. Probably with Intel paying another $100 million and royalties. Overall computer and especially software patents are so lame.

 

[metroplex]

the alternative is to take a Co-Op

but I'm already going to be bogged down with the FE exam and a senior EE project.

I wanted this last semester to be fun.

 

[dszd0g]

I'd take the class. Sounds like less work (Grad classes are almost never easy though).

 

[kalster]

i have taken an advanced arch course (grad course) where we had to learn about itanium , well it will be fun i think, its a completely diff approach to processing, its called the EPIC architecture, i think you will find the concepts of speculation and predication, and ofcourse VLIW (very long instruction world) which itanium uses very different from what x86 uses,
if ur into vlsi or comp arch u shud take it for sure

 

[Mavrick]

I'm actually following a microprocessors architecture course right now, and we cover everything from MIPS to Pentium 4/Athlon and Itanium. Honestly, I prefer the Pentium 4 section to the Itanium one, but it sure is nice to learn both architecture. Take the course, you won't regret it!!

BTW, my teacher also worked for Intel for a few years. Needless to say that this guy knows what he's talking about and is the best teacher we have!

 

[pm]

I think the Itanium is pretty interesting. I'd recommend it.

Patrick Mahoney
Microprocessor Design Engineer - Itanium Processor Family
Enterprise Processor Division
Intel Corp.

 

[kalster]

I think the Itanium is pretty interesting. I'd recommend it

how is itanium 2 (mckinley) different from the orignal itanium architecturally, i know mckinley has increased cache size but any fundamental difference?

 

[majewski9]

I think that the Itanium arch class would be interesting to take but I think that it will be most certainly useless. I know that the Itanium has a completly different register set than x86 processors. It would be more useful to take a class on x86. I take one called Digital Systems III and we program in assembly for x86. Its a nice class to take since most assembly programing is for x86. Take the class though! Its a new arch and hasnt really caught on yet so I dont think you'll use anything from this class anytime soon.

 

[metroplex]

The intel guy taught us how to programm 8088/8086 processors using assemby in an undergrad class - but since this is my last semester - and I'm focused on the FE Exam (for EIT status) as well as my senior EE project - I won't have any time for a real thinking-man's class.

If the Itanium classes are HARD - then I might pass but it sounds to me like its worth a look.
Its not everyday an Intel guy that wrote a book on the Itanium comes to teach it

 

[pm]

how is itanium 2 (mckinley) different from the orignal itanium architecturally, i know mckinley has increased cache size but any fundamental difference?

The Itanium 2 is a completely new design. It's a different core entirely from the first Itanium (Merced). There are a lot of differences, buit the main ones:

• The pipeline is shorter.
• The FSB width is twice as wide (128 bit vs. 64 bit) and the frequency is faster (2x200MHz vs. 2x133MHz).
• Cache latencies are reduced subtantially and cache sizes are the same or larger(the level 1 cache - the unit that I worked on - has an access time of 1 cycle vs. 2 cycles on Merced).
• Cache ports (enabling simultaneous accesses to array) are increased on the caches.
• Instructions are fully-bypassed in the integer execution unit and there are more execution units (6 vs. 4).
• Addressing area increased (both physical and virtual)

Its not everyday an Intel guy that wrote a book on the Itanium comes to teach it

What is the lecturer's name?

 

[metroplex]

Walter Triebel