• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

Is Taulatin 512k using 32 individual caches of 16k apiece?

MadRat

Lifer
I remember reading an article somewhere about how the Taulatin 256k version had eight 32k caches for its L2 cache. After looking at the picture of Taulatin 512k it looks more like thirty-two individual caches. That would make each cache 16k apiece. If that is the case then I'd also think the 256k Taulatin was using sixteen (16k) caches for its L2 cache.

Picture of Taulatin 512k
 
If they are all using the same route to the CPU, what's it going to matter if they are separate? Now, if they have dedicated paths that would be a different story.

Also, remember that with the P3 architecture, data that is stored in the L1 cache must be sent threw the L2 cache as well. At least, it was this way with the P3 Coppermines. The Athlon's L2 cache has a special name because the L1 and L2 cache are independent of each other, which probably gives it a performance boost.
 
Back
Top