Is Intel's "Process Lead" Somewhat a Sham?

[Khato]

Xilinx Ships Industry's First 20nm All Programmable Product


Granted its FPGA but TSMC's 20nm process is ready since 2013.

In the same way that Xilinx shipped their first 28nm FPGA made by TSMC in March of 2011 - http://press.xilinx.com/2011-03-18-...elopment-Platform-for-Next-Generation-Systems

FPGA typically leads 'normal' designs by three to four quarters in large part because it's a great test vehicle for TSMC to use while making final tweaks.

 

[piasabird]

People should buy mobile devices designed for how they want to use them, and not whatever is on sale. i.e. Text, Music, Video, Photos, Database, MS Word, etc. They just test the device running the actual applications you use. The other problem is how people charge their devices. Then some devices will run even slower after it is full of spyware and other junk you store on it and the number of applications you download with lousy software that waste your resources. Put 30-50 applications on a device and then try running it while Skype or some odd software is running.

 

[AtenRa]

In the same way that Xilinx shipped their first 28nm FPGA made by TSMC in March of 2011 - http://press.xilinx.com/2011-03-18-...elopment-Platform-for-Next-Generation-Systems

FPGA typically leads 'normal' designs by three to four quarters in large part because it's a great test vehicle for TSMC to use while making final tweaks.

I dont disagree about that but it also doesnt negate the fact that 20nm (as a process) was ready in H2 2013.

 

[Ajay]

In the same way that Xilinx shipped their first 28nm FPGA made by TSMC in March of 2011 - http://press.xilinx.com/2011-03-18-...elopment-Platform-for-Next-Generation-Systems

FPGA typically leads 'normal' designs by three to four quarters in large part because it's a great test vehicle for TSMC to use while making final tweaks.

Oh noos! You've unmasked the infamous 'pipe cleaners'. Now everyone will know D:

 

[witeken]

I dont disagree about that but it also doesnt negate the fact that 20nm (as a process) was ready in H2 2013.

If it would have only been ready in H2 2013, you wouldn't have 20nm chips for another 2 years or so. Intel already figured out 10nm, but that doesn't mean anything obviously if you don't have appropriate yields. In fact, Intel could have started 14nm volume production exactly 1 year ago.

 

[sm625]

It doesnt really matter what sort of process tech lead intel has because they waste so many transistors on their horrble gpu which is about half as efficient as maxwell @ 28nm. If intel were to license maxwell and put that on their die then they would be able to put out an SoC that really highlights their process advantage. Intel is trying to brute force their way into a market that requires fps per watt, and they cannot compete there, even with their process advantage. IMG Wizard, nvidia Maxwell, even Adreno is more efficient. At the end of the day, a shrunken turd is still a turd. Intel graphics at 14nm will still be garbage. So what is the point in having the process advantage when in the end they are still so far behind? If intel were to release 10nm today, then maybe then they could compete with today's 28nm maxwell. That's how far behind they are...

 

[jdubs03]

It doesnt really matter what sort of process tech lead intel has because they waste so many transistors on their horrble gpu which is about half as efficient as maxwell @ 28nm. If intel were to license maxwell and put that on their die then they would be able to put out an SoC that really highlights their process advantage. Intel is trying to brute force their way into a market that requires fps per watt, and they cannot compete there, even with their process advantage. IMG Wizard, nvidia Maxwell, even Adreno is more efficient. At the end of the day, a shrunken turd is still a turd. Intel graphics at 14nm will still be garbage. So what is the point in having the process advantage when in the end they are still so far behind? If intel were to release 10nm today, then maybe then they could compete with today's 28nm maxwell. That's how far behind they are...

Broadwell is expected to be a substantial bump with Gen 8, so their disadvantage is about to get smaller. But I think it is really Skylake where we will see a revolutionary change to their GPU capabilities (adding in Larrabee/Xeon Phi properties). They have to be confident in their ability to pursue greater technical proficiency with their GPUs or else licensing Maxwell would be the correct thing to do.

Maxwell on 14nm would be quite the monster.

 

[witeken]

It doesnt really matter what sort of process tech lead intel has because they waste so many transistors on their horrble gpu which is about half as efficient as maxwell @ 28nm. If intel were to license maxwell and put that on their die then they would be able to put out an SoC that really highlights their process advantage. Intel is trying to brute force their way into a market that requires fps per watt, and they cannot compete there, even with their process advantage. IMG Wizard, nvidia Maxwell, even Adreno is more efficient. At the end of the day, a shrunken turd is still a turd. Intel graphics at 14nm will still be garbage. So what is the point in having the process advantage when in the end they are still so far behind? If intel were to release 10nm today, then maybe then they could compete with today's 28nm maxwell. That's how far behind they are...

Half as efficient? 14nm garbage? That are a lot of unfounded claims. Do you have any sources/proofs, or do you just base this on that Nvidia PR slide? We all know you mustn't trust PR slides that claims things about performance. I certainly wouldn't trust Nvidia's claims. Anyway, I could also show you claims from an Intel architect who claims they're competitive; so the answer simply depends on who you ask.

Also, Gen7 is about 2 years old, and that was about the first real serious GPU architecture that isn't some hobby project, while Nvidia exists to make good GPUs; a 'slight difference'. You would expect them to have the superior architecture.

Secondly, you forget that Maxwell has to compete against Gen8, which has been hyped up for the last 2 year or so. So the gap in architecture is rapidly closing and I don't expect Maxwell to perform any better against Broadwell APU in terms of performance per watt.

Thirdly, what does it actually matter for consumers if they use their process advantage to become more competitive? From a technical point of view, you could make the case, but the worse architecture and the superior process node simply cancel out for consumers (so for Intel it doesn't matter if they don't have a top notch architecture).

Lastly, you claim that only the GPU matters, which obviously isn't the case. The CPU is just as important and there Intel has taken the lead at 22nm with Silvermont, while Nvidia has horrible A15s. They'll do the same at 14nm with graphics, which will really be Intel's first serious node for mobile (their 22nm parts have inappropriate BOM).

 

[erunion]

I dont disagree about that but it also doesnt negate the fact that 20nm (as a process) was ready in H2 2013.

That depends on what is meant by ready. If ready means equipment installed and producing wafers then it was ready. If ready means suitable for volume production of consumer products then no it wasn't ready.

That's the issue when comparing Intel vs foundries, different definitions of when a process is "ready".

 

[Khato]

Oh noos! You've unmasked the infamous 'pipe cleaners'. Now everyone will know D:

Oops, I often forget that I'm not supposed to share what's common knowledge in the industry with the general public Don't worry, I do remember to barely even hint about the actual confidential stuff - after all, sharing such would ruin the amusement factor of speculative threads like this.

Anyway, the fact that FPGA designs have different requirements of a process is one that some seem to forget whenever it's convenient though. Otherwise we wouldn't have implications that a process that's capable of making a functional FPGA is ready for ASIC mass production.

 

[AtenRa]

If it would have only been ready in H2 2013, you wouldn't have 20nm chips for another 2 years or so. Intel already figured out 10nm, but that doesn't mean anything obviously if you don't have appropriate yields. In fact, Intel could have started 14nm volume production exactly 1 year ago.

I meant production ready. Volume production of 20nm SoC HKMG started on 6 January 2014.

 

[AtenRa]

Oops, I often forget that I'm not supposed to share what's common knowledge in the industry with the general public Don't worry, I do remember to barely even hint about the actual confidential stuff - after all, sharing such would ruin the amusement factor of speculative threads like this.

Anyway, the fact that FPGA designs have different requirements of a process is one that some seem to forget whenever it's convenient though. Otherwise we wouldn't have implications that a process that's capable of making a functional FPGA is ready for ASIC mass production.

I have acknowledge the fact that Xilinx was shipping FPGAs and i have said the process was production ready. They did manufactured working ICs on 20nm process and shipped them to customers after all.
And yes volume production started on January 2014, so they(TSMC) started 20nm the same time Intel started 14nm.

 

[erunion]

And yes volume production started on January 2014, so they(TSMC) started 20nm the same time Intel started 14nm.

As has been pointed out shipping a small number of fpga is not equivalent to ramping a consumer CPU.

 

[AtenRa]

As has been pointed out shipping a small number of fpga is not equivalent to ramping a consumer CPU.

Why dont you read more carefully what i said ?? 20nm FPGAs were manufactured in Early H2 2013 and shipped to Xilinx customers in late Q4 2013.

Now, Volume production of TSMCs 20nm has started in January the 6th 2014. That is around the same time Intel has started Volume production of its 14nm.

 

[Khato]

Now, Volume production of TSMCs 20nm has started in January the 6th 2014. That is around the same time Intel has started Volume production of its 14nm.

If only 'volume production' meant the same thing for TSMC as it does for Intel. But I'll refrain from beating the dead horse any further than that.

Oh, and Intel has actually started 'volume production' on 14nm? Huh.

 

[witeken]

Yes, in Q1. They originally planned Q4, but due to yield problems delayed by 1Q.

Edit, from the Q1 transcript:

And in the Technology and Manufacturing Group, who've worked to advance Moore's Law as foundational to our long-term success, we began production on our 14-nanometer process technology and remain on track to launch Broadwell in the second half of the year.

We'll get a little bit more good news associated with Q2 being a bit up in terms of volume, so that's about half a point and then we get half a point in Q2 associated with lower platform write-offs as we qualify those first 14-nanometer products towards the end of the quarter.

[...]

And then we'll also see costs coming down from Q1 to Q2 and Q3 and then in Q4, we'll see a lot of volume coming out of multiple factories on 14-nanometer. And so you get a bit of a mix up in cost from those early wafers coming off of 14-nanometer and again that's a phenomenon you'd see from us in the past, we’d expect that to come down pretty rapidly after that, but the first quarter tends to be pretty expensive.

 

[liahos1]

Comments

Said CEO Rick Wallace,

Now in logic and foundry, with the introduction of the new 3-D gate architectures, the yield issues our customers are grappling with today are proving to be the most challenging that the industry have ever faced, and even the smallest variation and process margin can cause significant yield losses for these devices. Some of the issues of these processes people are dealing with are unique defect issues … new etch steps that are all part of the FinFET process. That’s just a small part of the complex technical challenge associated with bringing new 3-D device architectures to market Now, in memory the market leaders continue to demonstrate a commitment to pushing capex investment in both DRAM and NAND. However, they’re also facing similar challenges to logic when they deal with their leading edge complexity … There’s uncertainty over the timing of follow-on production for 3-D NAND … It’s clear from our discussions with customers that despite near-term slowdown in demand their intentions are continue to execute strategy for growth at the leading edge and invest at high level to achieve and advance their competitive roadmap. But it is also clear that issues related to leading edge device yield and high concentration of demand across a consolidated customer base and uncertainty over the timing of follow-on capacity have introduced a degree of variability into our quarterly demand forecast and have made visibility into our customer production plans extremely challenging today


Also corroborates comments ASML said about TSM delays at 16nm. Just saying. Its an open secret now. The supply chain dont lie son.

 

[liahos1]

"Yeah, so what has happened so far, certainly from an external event, which I think is very important, is we do have working test chips in 14-nanometer with our technologies, both included PLLs, transceivers, and FPGA blocks. As we've highlighted going back years, we like to do test chips in order to prove the silicon and make sure that there's good silicon simulation correlation and that the blocks work so that when we do the final assembly of the chips everything is working well. We're very happy to announce that we've got the first working transceiver in a FinFET technology. And so we're very excited about the fact that we're well on pace with what we're doing with Intel at this point."

 

[liahos1]

"And in foundry, we see strong demand for the 28-nanometer node, but expect some adjustment to shipments for the continued ramp to volume production for both 20-nanometer planar transistor and 16/14-nanometer FinFET node. These adjustments are impacting our revenue forecast for Q2 and Q3. "

"Device architecture limitations, complexity and learning curves are challenges that customers need to overcome, and it will be a matter of time before they are fully resolved. And we are currently in a phase where reassessment of the
timing of the production ramps for these most advanced nodes needs to be made...In that context, it is logical that we're seeing some adjustments of the rollout of the 20-, 16- and 14-nanometer capacity ramps."



edit -

Where Daniel Nenni at?

 

[Ajay]

^^ Thanks for the additional supplier info

 

[erunion]

Why dont you read more carefully what i said ?? 20nm FPGAs were manufactured in Early H2 2013 and shipped to Xilinx customers in late Q4 2013.

Now, Volume production of TSMCs 20nm has started in January the 6th 2014. That is around the same time Intel has started Volume production of its 14nm.

The FPGAs were sampling in 2013, but volume production didnt start until 2014.
That is the 20nm volume production being mentioned in press releases: Xilinix FPGAs.

All you had to do was read the official xilinix PR already linked.

Initial UltraScale device samples are shipping now. General sampling begins in Q12014.

 

[Ajay]

Oops, I often forget that I'm not supposed to share what's common knowledge in the industry with the general public Don't worry, I do remember to barely even hint about the actual confidential stuff - after all, sharing such would ruin the amusement factor of speculative threads like this.

Anyway, the fact that FPGA designs have different requirements of a process is one that some seem to forget whenever it's convenient though. Otherwise we wouldn't have implications that a process that's capable of making a functional FPGA is ready for ASIC mass production.

Well, obviously, you caught on to the fact that I was in part joking. But I was trying to reinforce the point I thought you were making. Some people here do understand the concept of pipe cleaners in semicon manufacturing; but I didn't think people were understanding that this means using less complex and/or lower frequency part runs to help weed out some early manufacturing issues before mass production starts.

The other bit (I know you know this), even after that, parts for mass production need to be ramped up to improve yields and may need a respin after early pre-production if there is a logic flaw or an unacceptable drop in frequency is needed to pass functional testing (or has other unacceptable characteristics like high thermals, etc.).

Like someone said (maybe elsewhere in this forum) - these fabs aren't making lemonade!

 

[Revolution 11]

Maybe not my best analogy, Lemonade Tycoon clearly shows that even lemonade can be complicated.

But yes, silicon is complicated. More than lemonade.

Back to this thread, Intel's fabs are as great as ever. But I have heard for almost half a decade now how Intel will use their fabs to crush XYZ competitors in mobile. And it hasn't happened yet. Silvermont may be performance/power superior but I don't know a single product from the top of my head that uses x86 chips. And I am reasonably tech-interested. Not looking good.

 

[witeken]

What about the T100? That is the most popular tablet for many months now, on the most visited Dutch tech site, beating the iPads, Nexus and Galaxy tablets. If you've followed that other thread on this forum, you might know that there are a lot of other interesting products announced with Bay Trail. The same will soon happen with Android and and some time later also with phones.

 

[Exophase]

What about the T100? That is the most popular tablet for many months now, on the most visited Dutch tech site, beating the iPads, Nexus and Galaxy tablets. If you've followed that other thread on this forum, you might know that there are a lot of other interesting products announced with Bay Trail. The same will soon happen with Android and and some time later also with phones.

Yeah and Exynos 5250 Chromebooks were the best seller in the laptops category on Amazon for months, that should mean there are tens of millions of them out there right? Being most popular for one particular seller or seller aggregate could just mean that place offers the best way to get that product while its competitors are more distributed to other places.

Definitely not a sign of crushing their competitors in any broad sense.