I've been running this through my head over and over again and I've come to a somewhat weird thought. In the before-time (South Park reference), when processors were a whole instruction per clock, the faster the "MHz", the faster the processor. But ever since pipelining came to be in processors, a clock was merely how long it took for one stage to finish, not for an entire pass through the processor. Now my question is, doesn't that make clockspeed quite irrelevent? I'm not talking about its effects on performance, I'm talking about even needing a "clockspeed" at all.
To put my arguement into an example, let's suppose Intel counted a shift in every 2 stages of the P7 core as one clock. You could say the P7 core would then have a 10-stage (as 2 of the current "stages" would count as 1) but the clockspeed of a 2.0 GHz would be counted as a 1 GHz instead and the average instructions done per clock would be phenominal. In contrast, let's say AMD counted each of the stages of their K7 design as 2 stages. A 1.8 GHz Athlon could then be stated to be 3.6 GHz. Sure both processors would still achieve the same performance as in instructions per second as their original "clockspeed" rating.
I know there is some limitation as to how many stages you can divide your processor into (or at least say you divided it into). I think I read somewhere that each stage can only be as short as the time it takes to make one full pass through the ALU. My question is, if the two can be classified as any number of stages (like if you could say the P4 is 10-stage by saying each 2 stage only counts as 1) why is it that the P7 core design can scale higher? It's suppose to go up to 10 GHz (if you count it as 10-stage, that'd be 5 GHz) while the K7 design isn't going past 2 GHz it looks like. Shouldn't it be the same?
To put my arguement into an example, let's suppose Intel counted a shift in every 2 stages of the P7 core as one clock. You could say the P7 core would then have a 10-stage (as 2 of the current "stages" would count as 1) but the clockspeed of a 2.0 GHz would be counted as a 1 GHz instead and the average instructions done per clock would be phenominal. In contrast, let's say AMD counted each of the stages of their K7 design as 2 stages. A 1.8 GHz Athlon could then be stated to be 3.6 GHz. Sure both processors would still achieve the same performance as in instructions per second as their original "clockspeed" rating.
I know there is some limitation as to how many stages you can divide your processor into (or at least say you divided it into). I think I read somewhere that each stage can only be as short as the time it takes to make one full pass through the ALU. My question is, if the two can be classified as any number of stages (like if you could say the P4 is 10-stage by saying each 2 stage only counts as 1) why is it that the P7 core design can scale higher? It's suppose to go up to 10 GHz (if you count it as 10-stage, that'd be 5 GHz) while the K7 design isn't going past 2 GHz it looks like. Shouldn't it be the same?
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