firewolfsm
Golden Member
Basically what the title says, could we run transistors at half power and make a trinary number system for computers, could that improve performance by 33%?
-
We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.
Is a Power State Other Than 0 and 1 Possible?
- Thread starter firewolfsm
- Start date
TuxDave
Lifer
Tri-essentially means the output could be in three situations. The first two we know which is basically either pulled up to the power rail or pulled down to grown. The third is basically disconnected from the inputs. It can be used in cases where multiple drivers are driving the same line but I have yet to hear of anyone using the 3rd state as logical data.
TuxDave
Lifer
You'd have to toss CMOS out of the window and find a new set of circuit topologies to handle several input voltages as logical data. I believe in the end, you end up with more complicated gates (and more area/power wasteful) which offsets any performance gains you may get. But this isn't to discourage anyone to keep looking into this area. I'm thinking the solution may be in the process as opposed to a topology.
I think there would be two problems: signal integrity, and reliable detection of the intermediate voltage
First, assuming you could design an ideal gate that detects 0 volts, 0.5 volts , and 1 volt, you'd run into a lot of problems, because crosstalk and other effets can easily swing a signal enough that it would temporarily be interpreted as the wrong value (i.e. a "glitch" - for some circuit topologies they just cause extra delay, but for others they cause incorrect evaluation of the result). It's hard enough ensuring that noise margins are met with current gates that swing the whole way.
Second, due to device and process variations it would be very difficult to design gates that could distinguish between the voltages reliably. If you consider a normal CMOS "NOT" gate, you generally design it so it's trip point is about half way between 0 and the supply voltage, but when you actually manufacture it, it's very likely to be higher or lower just due to random variations (even though the average trip point of all of the gates could be about where it was designed to be). What's worse is that the fab guys like to tweak the manufacturing process, so if they discover a way to make N-type transistors faster (and can't make P-type transistors faster by the same amount), the average trip point moves.
First, assuming you could design an ideal gate that detects 0 volts, 0.5 volts , and 1 volt, you'd run into a lot of problems, because crosstalk and other effets can easily swing a signal enough that it would temporarily be interpreted as the wrong value (i.e. a "glitch" - for some circuit topologies they just cause extra delay, but for others they cause incorrect evaluation of the result). It's hard enough ensuring that noise margins are met with current gates that swing the whole way.
Second, due to device and process variations it would be very difficult to design gates that could distinguish between the voltages reliably. If you consider a normal CMOS "NOT" gate, you generally design it so it's trip point is about half way between 0 and the supply voltage, but when you actually manufacture it, it's very likely to be higher or lower just due to random variations (even though the average trip point of all of the gates could be about where it was designed to be). What's worse is that the fab guys like to tweak the manufacturing process, so if they discover a way to make N-type transistors faster (and can't make P-type transistors faster by the same amount), the average trip point moves.
bobsmith1492
Diamond Member
Yes - analog circuits run on an infinite array of voltage levels. Also, look at analog computers: http://en.wikipedia.org/wiki/Analog_computer
I thought the disconnected state was just high-z in binary. The trinary I remember hearing about had high, low and negative (1,0,-1). Not sure if its actually used or not. Just remembered hearing about in class when someone asked the obligatory digital with more than 1s and 0s question.
Matthias99
Diamond Member
Also, some networking specs (like the ones used for cable modems, and possibly also DSL) use more than two voltage levels. eg, QAM (Quadrature Amplitude Modulation) uses four voltage levels (and usually a phase shift or two) to encode data.
In theory, yes, you can do it. Practically, at the transistor level, it's really hard to do it and have it work fast, at least with today's technology.
Another variant of the bit is the qubit, which occurs in quantum computing. A qubit can be placed in an indeterminate state (essentially taking on both 0 and 1 values simultaneously).
Reading the value of the qubit, simply causes it to revert randomly to one of the two possible states, which isn't too useful. However, operations (eg. additions, subtractions, comparisons, etc...) performed on a qubit in an indeterminate state essentially operate on both values simultaneously. While it is not possible to read both of the corresponding results directly, it is possible to determine the relationship between the results (eg. both results are the same or each are different). Furthermore by entangling n qubits, the system can then simultaneously operate on the corresponding 2^n values and evaluate the relationship between the resulting 2^n results. Using these properties, efficient algorithms have been developed to perform conventionally "difficult" tasks, such as factoring large numbers and database searching (eg. Shor's algorithm).
The hard part is developing a quantum computer with sufficient qubits to do anything useful. Currently, the best anyone has done is around 12 qubits.
Reading the value of the qubit, simply causes it to revert randomly to one of the two possible states, which isn't too useful. However, operations (eg. additions, subtractions, comparisons, etc...) performed on a qubit in an indeterminate state essentially operate on both values simultaneously. While it is not possible to read both of the corresponding results directly, it is possible to determine the relationship between the results (eg. both results are the same or each are different). Furthermore by entangling n qubits, the system can then simultaneously operate on the corresponding 2^n values and evaluate the relationship between the resulting 2^n results. Using these properties, efficient algorithms have been developed to perform conventionally "difficult" tasks, such as factoring large numbers and database searching (eg. Shor's algorithm).
The hard part is developing a quantum computer with sufficient qubits to do anything useful. Currently, the best anyone has done is around 12 qubits.
Well, yes. But a qubit is still essentially a standard two-state system since you are operating on a two-state basis.
That said, I have seen suggestions for using three levels in a qubit. The idea is that since it difficult to entangle many qubits you better make the most of the ones you already have, instead of 2^n you would get 3^n which is a significant difference.
The problem is that adding third level almost automatically reduces the coherence time, generally speaking you want the third lever to be are far away as possilbe in terms of energy to reduce the probability of exciting the system (which leads to decoherence).
So far the trade off hasn't been worth it so most people are still working on 2-level systems (using higher levels only for the read-out).
That said, I have seen suggestions for using three levels in a qubit. The idea is that since it difficult to entangle many qubits you better make the most of the ones you already have, instead of 2^n you would get 3^n which is a significant difference.
The problem is that adding third level almost automatically reduces the coherence time, generally speaking you want the third lever to be are far away as possilbe in terms of energy to reduce the probability of exciting the system (which leads to decoherence).
So far the trade off hasn't been worth it so most people are still working on 2-level systems (using higher levels only for the read-out).
Modern ICs operate at the minimun voltage necessary for stable operation (1.5v or whatever). If you want a tri-state processor, you'd need to double that for 3.0v. to run a chip at 3.0v would require a lot more than a 33% clock decrease to keep from destroying themselves. (this also excepts lost real estate to more complicated gates).
edit: but is it possible? According to the links, yes.
The reason that ternary machines (eg. Ternak) were dumped was that the physical medium used to store a "trit" (three-state unit value, as opposed to a "bit" which is of two states) used twice as many materials as required to store a "bit". This means that if the materials were used to make 2 bits (forming 4 possible combos), it would actually be better than storing 1 trit (forming 3 possible combos).
You can significantly decrease the voltage if you're willing to run slower. That's what Cool'n'Quiet / SpeedStep do. The voltage is limited on the upper end by power budgets and on the lower end by required performance. Transistor performance is very non-linear, so there's a sort of sweet-spot; below this point, you're trading off a lot of speed to save a little power, and above it you're burning a lot of power to get only a little bit more speed.
bobsmith1492
Diamond Member
However, there is an inherant THRESHOLD (thanks Dave) voltage for all BJTs and FETs; if you do not cross it, they will not turn on, no questions asked. So, there is a real limit. Only by changing the properties of the material and (maybe?) the size of the transistor can you change their threshold voltages.
TuxDave
Lifer
I know what you're talking about but just wanted to clear up some terms. Breakdown is usually referred to when the voltage is too high. This creates a large voltage drop across the gate oxide and will break down and become conductive and totally fubar everything.
But yeah, when the voltage drops really really low like below the transistor threshold voltage, then we say that it can never turn on. However, sub-threshold voltage logic circuits have been designed in academia and show that it does work although it's very noise sensitive, very very slow and doesn't swing rail to rail.
bobsmith1492
Diamond Member
Thanks, you're right - I wasn't talking about breakdown but threshold I guess.
bobsmith1492
Diamond Member
Eh, the more cliches the better. Get enough together and you can make a feature-length movie!
TRENDING THREADS
-
Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)- Started by DisEnchantment
- Replies: 25K
-
Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads
- Started by Tigerick
- Replies: 25K
-
Discussion Intel current and future Lakes & Rapids thread- Started by TheF34RChannel
- Replies: 24K
-
-
