Question Intel Q2: 7 nm in bad shape

[jpiniero]

Investor Relations

Intel (Nasdaq: INTC) is an industry leader, creating world-changing technology that enables global progress and enriches lives. Inspired by Moore’s Law, we continuously work to advance the design and manufacturing of semiconductors to help…

www.intc.com

Here's the money shot:

The company's 7nm-based CPU product timing is shifting approximately six months relative to prior expectations.
The primary driver is the yield of Intel's 7nm process, which based on recent data, is now trending approximately
twelve months behind the company's internal target.

Data Center volume up 29% (plus 5% ASP)
Notebook up 9%
Desktop down 14% - not as bad as I had thought

Q3 guidance bad - revenue of 18.2b vs 19.2b in 2019

 

[Atari2600]

Has TSMC been lucky enough to snap up most of the people capable of advancing process tech in a timely fashion right now?

Probably not.

Not being process leaders has likely led TSMC to more carefully and continually revise its internal management processes and workflows to "catch up".

Intel, on the other hand, has largely cruise controlled. Now, in crisis, their possible attitude of "we're the best, why would we need to change how we do things?" is biting them.


It also likely doesn't reflect well on the US academic & research system. The long term, profit is not a consideration, research, that leads to process development is probably starting to be missed - as more often than not, phds and post-doctorates are now being asked questions like "what is the ROI on this after 3 years of funding?" Whereas really the question should be "is there likely to be at least a neutral ROI on this at some point in the next 20 years after 3 years of funding?"

 

[JoeRambo]

The most troubling sign for me is this: with 10nm we had an excuse of Intel trying to be overambitious with shrinking and changes to materials and whatsoever. People could understand Intel trying to shrink hard to win foundry and mobile and Apple and whatever business. Sometimes when you take big risks, you loose no matter the effort.

But with 7nm there are no excuses left, flat out failure of the most critical node shrink in Intel's history. Intel had plenty of time and money to change the course to whatever needs to be done, be it poaching people, be it buying EUV machines en masse. The fact that this agony is so long is no longer only management failure, but also failure at board level to fix management problems. If board is dysfunctional there is no hope left for company in the long run. That same board is a joking matter when it comes to corporate acquisitions, some write-offs so major, that these guys will soon be able to consult mr. Apotheker of Autonomy acquisition fame in how to waste resources on epic level when the house is burning.

 

[mxnerd]

Take away Intel’s crown and overtake Samsung, TSMC wins in a nanoscale dust

The article is in traditional Chinese. Use Google Translate if you are interested reading it.

TSMC also helped ASML's EUV development.

 

[Ajay]

Has process tech at the smaller nodes become so complicated that the number of people capable of advancing it, has shrunk dramatically and if you don't get some of those small handful of process tech geniuses, it won't matter how much money you throw at things?

I wonder if Bohr didn't have the knowledge/brain power to go much beyond 14nm, even if he had been a superstar for the last 30 years in process tech?

Has TSMC been lucky enough to snap up most of the people capable of advancing process tech in a timely fashion right now?

No, it is still possible to advance, TSMC is showing that; and Intel has the money to match TSMC's research capabilities (I think, throwing billions of dollars at investors may mean less money for operations). The real question, is how well the process research group did in raising up young talent, who now, in their 40s and 50s, would be making their peak contributions. They have to hire the right people and then mentor them in such a way that they can shine. In the tech fields I've worked in, top people stand out pretty quickly. If management sucks, as @dmens has pointed out, it's easy to extinguish a bright flame pretty quickly.

 

[A///]

It' worth looking at those 10nm parts. We have
- Cannon Lake. (Oh dear, let's forget that right way).
- Ice Lake. Slightly coooler than 14nm+++Lake, but mainly ~same peak performance
- Lakefield. Woohoo, competing strongly against a mid-range Qualcomm chip

This is not a power lineup. But that's not the point, the more important point is the qualifiers.
The biggest Ice Lake that ships is 4 cores, die size of 122mm^2. If the process is yielding great, why were no desktops at say 6 or 8 core ever released?
Why was Lakefield crippled with just one SC core rather than two?
And Ice Lake is being followed up not by a desktop part, but by Tiger Lake, another mobile quad core part.

Look at this pattern. Everything suggests that they are having yield problems! They're limiting themselves to the smallest parts they can get away with shipping while still matching AMD (sometimes to absurd lengths, as with single core SC on Lakefield). They apparently have no interest in moving the desktop to 10nm. Ice Lake SP has slipped from "1st half of 2020" to "Q3 2020" to (a few days ago) "late 2020" with language vague enough that it's probably early 2021.

It's hard to look at this and conclude "10nm is yielding great, can handle large dies, and is ready to be scaled up across the product line.

Tell me where I said 10nm was yielding great or yield your utterly silly post. You're talking to someone who dumped a few hundred Intel shares months ago. Not once in my post history have I advocated that Intel is, was, or will succeed. They are down for the count for at least the next 5 years. Even if Intel began designing a completely new µarch in January, they would be at least 3.5-4 years from market. They can throw 30 Billion at that µarch and it wouldn't be done any faster. This doesn't even count validation, tapeout and buildup. You'd be looking at a late 2025 or early 2026 launch.

Anyone who thinks Intel hasn't hit a wall right now and won't on 10nm or even 7nm should they get those going without a top to bottom µarch redesign is kidding themselves. And that big-little core they have planned in a few years is a desperate attempt at remaining relevant.

 

[name99]

Tell me where I said 10nm was yielding great or yield your utterly silly post. You're talking to someone who dumped a few hundred Intel shares months ago.

"Half-broken" is limited in how much it tells. I tried to amplify on "half-broken" to clarify what works and what doesn't. TL;DR
- frequencies are slightly worse than 14nm+*
- power is quite a bit lower than 14nm+*
- yields appear to be (by every indicator) terrible and not getting better

If you think you can provide a better summary, go ahead.
Just because someone replies to your post doesn't mean they're disagreeing with you, or trying to pick a fight.

 

[A///]

"Half-broken" is limited in how much it tells. I tried to amplify on "half-broken" to clarify what works and what doesn't. TL;DR
- frequencies are slightly worse than 14nm+*
- power is quite a bit lower than 14nm+*
- yields appear to be (by every indicator) terrible and not getting better

If you think you can provide a better summary, go ahead.
Just because someone replies to your post doesn't mean they're disagreeing with you, or trying to pick a fight.

I didn't see your post as disagreement. Superfluous at best.

 

[name99]

Brian Krzanich was an engineer.

Careful with that statement. Being an engineer is a mindset, it's not a piece of paper.

BK had engineering credentials, but he was not an engineer. He didn't think like an engineer, in terms of risk, tradeoffs, and long time horizons. He thought like a gambler.

Having credentials for X is not the same thing as being X; this is a problem throughout US society right now...

 

[Doug S]

You guys are all missing that TSMC was behind Intel for so many years not due to lack of expertise (necessarily, it can't be proven either way) but because they didn't have the customer base necessary to try to keep up. You can't buy the new equipment needed for a smaller process only to have it sit around mostly unused the first year or two - it needs to be fully utilized or its cost cannot possibly be justified. That means you need customers who you know will buy sufficient quantities of your leading edge process, and will be around for the long haul. You can't make these sorts of investments if there's a chance they'll switch a different foundry over saving a few bucks, or their business may dry up, etc.

GPUs and AMD (once freed from the clutches of GF) didn't have enough volume (because Intel's integrated GPUs ate more and more of the GPU market share so TSMC knew the market for discrete GPUs would continue to shrink) and not reliable enough (because AMD was never far from insolvency until a few years ago) for TSMC to make the kind of investments necessary.

It wasn't until the smartphone market started driving volumes of hundreds of millions in the early part of this decade that TSMC could count on a sufficient quantity of leading edge demand. It was obvious that market would continue to grow and not be disrupted in the foreseeable future. It had also become obvious by that point Intel would not participate in that market in any meaningful way so this was finally the volume play for leading edge processes foundries like TSMC had been hoping for. It also helped that using GPUs for compute became a thing around the same time, giving a boost to the otherwise declining discrete GPU market.

Couple that with Apple having reason to not want Samsung to fab their chips and Intel apparently being unwilling/unable to do so, and TSMC got the major anchor customer they've always wanted, and even better one willing to prepay for first access to leading edge capacity. That gave them the final piece they needed to become the process leader they are now.

 

[LightningZ71]

In my personal opinion, I also believe that TSMC has helped themselves by not only working towards big node advances, similar to Intel's jumps from 14 to 10 to 7, but also working on the various "sub-nodes" or process improvements to each of their main nodes. For example, they had three "12nm" nodes, four "7nm" nodes, a single 10nm node, a "6nm" node that is essentially another improved 7nm node, and a history of doing the same for larger nodes. This allows them to work on process improvements at larger nodes before having to base a smaller node on them.

Intel seems to have at most two processes on any given node, and those are more just different density targets for different needs (CPU vs. I/O). They try for the best possible results on any given node before moving production onto it.

Part of all of this is a case of different focuses. TSMC needs to be all things to all people as they have customers from outside with all sorts of different needs. Intel is largely just a customer to themselves. They attempted to be a foundry, but failed at it .

 

[Doug S]

In my personal opinion, I also believe that TSMC has helped themselves by not only working towards big node advances, similar to Intel's jumps from 14 to 10 to 7, but also working on the various "sub-nodes" or process improvements to each of their main nodes. For example, they had three "12nm" nodes, four "7nm" nodes, a single 10nm node, a "6nm" node that is essentially another improved 7nm node, and a history of doing the same for larger nodes. This allows them to work on process improvements at larger nodes before having to base a smaller node on them.

Intel seems to have at most two processes on any given node, and those are more just different density targets for different needs (CPU vs. I/O). They try for the best possible results on any given node before moving production onto it.

Part of all of this is a case of different focuses. TSMC needs to be all things to all people as they have customers from outside with all sorts of different needs. Intel is largely just a customer to themselves. They attempted to be a foundry, but failed at it .

Those 'sub nodes' are really a foundry salesmanship thing. They come out with 6nm that's an incremental improvement on 7nm but uses the same design rules so it is cheap for customers to get a small bump without a complete redesign. Its what you do for what TSMC calls "long lived" processes - i.e. those that you will still be able to get wafers on a decade from now. Compare that to their 10nm which quickly goes away and never has any "sub-nodes".

TSMC's N7P and N6 are basically what Intel would call 10nm+ and 10nm++. N7+ is kind of a special case - they created it more to help them gain experience making wafers using EUV in a few layers before they went whole hog with N5. It won't be long lived like the rest of the N7 family.

 

[Ajay]

TSMC's N7P and N6 are basically what Intel would call 10nm+ and 10nm++. N7+ is kind of a special case - they created it more to help them gain experience making wafers using EUV in a few layers before they went whole hog with N5. It won't be long lived like the rest of the N7 family.

Interesting how well constant incremental improvement has worked of late for TSMC (probably since Chang came back in 2009). Sure beats Intel's giant leap forward strategy.

 

[LightningZ71]

You make a good point, but fail to note that Intel’s “+” nodes weren’t exactly ever on their roadmap and are more a “plan b” move to stay relevant in the face of competition. 14nm was late and was released in sub-optimal form. The various “+” iterations addresses its deficiencies and later pushed clock speed. Initial 10nm barely worked by Intel’s own admission and needed a + for commercially relevant yields. It’ll get yet another + as they try to cure its clock speed issues. We have yet to see the number of pluses that their 7nm will need to get where it was planned to be.

TSMCs various sub nodes are not all design rule compatible within the same mode generation. Some are aimed at density, some are aimed at efficiency and some are aimed at performance. It’s still far more variety that was actually planned than what Intel has targeted.

I’m certainly not saying that TSMC is perfect. I’m just speculating that their approach has a lot to do with their success.

 

[moinmoin]

You make a good point, but fail to note that Intel’s “+” nodes weren’t exactly ever on their roadmap and are more a “plan b” move to stay relevant in the face of competition. 14nm was late and was released in sub-optimal form. The various “+” iterations addresses its deficiencies and later pushed clock speed. Initial 10nm barely worked by Intel’s own admission and needed a + for commercially relevant yields. It’ll get yet another + as they try to cure its clock speed issues. We have yet to see the number of pluses that their 7nm will need to get where it was planned to be.

Indeed. When Intel started doing “+” nodes with 14nm they actually weren't node changes but changing the balance between density (which is Intel's primary goal for a new node) and performance/high frequency (which is easier to achieve with less density), so they were actually turning back the density advancements of the node. The result is less power efficient at lower frequencies which is why these "nodes" weren't used in mobile chips. Now 10nm is so broken that “+” nodes of it can be anything (and in Cannonlake's case is being pretended to never have existed).

 

[Doug S]

Intel has always done + nodes whether they named them that or not. The "tick" may have signaled a shrink, but there were tweaks to the process in between around the time of the "tock" as well, it didn't stay frozen for two years. They didn't need to call it out until their ability to make new processes function ran off the rails, and they didn't want people to think it was the exact same process. There's a reason why overclockers got better results from an Intel CPU on a process that had been around for a couple years versus one fresh out of the gate.

TSMC doing half nodes doesn't really help them in doing the next node, except in cases they added some critical change to the upcoming node to a special half node (i.e. like N7+) If they were planning on doing GAAFETs for N3, for example, and had an N5+ that substituted GAAFETs for FinFETs that would be a similar case to N7+ where it would be a "learning node" rather than something that will be around for a long time. But if they just have an N5P and N4 those won't help them when trying to do a new transistor type for N3 and thus doing N5P/N4 won't help N3.

 

[traderjay]

End of the day, you gotta give Intel Kudos for their ++++ Nobody can ever beat them for all the ++++ in the product marketing name. I mean for the average consumer w/o technical knowledge..all that ++++++++++ must trigger some good childhood memories when teacher gives them ++++ for work well done.

 

[Atari2600]

Wait till some PR guru realises they could use ^ symbols and POWER UP their process nodes faster than a bunch of power rangers on speed.

 

[TheELF]

They are down for the count for at least the next 5 years. Even if Intel began designing a completely new µarch in January, they would be at least 3.5-4 years from market.

Intel has the palm and sunny cove uarchs completed years ago and another few improvements on them.
Sunny features 20% more instruction units while other things are improved even more.It will be easily 20% faster per clock than skylake in anything that benchmarking sites are focusing on.Clocks will very probably be quite a bit lower than commetlake thou.
Sunny is intel's 10nm second iteration it was supposed to come out 2017 (to counter ZEN1) but there was no need to so they didn't release it.

Sunny Cove - Microarchitectures - Intel - WikiChip

Sunny Cove (SNC), the successor to Palm Cove, is a high-performance 10 nm x86-64 core microarchitecture designed by Intel for an array of server and client products, including Ice Lake (Client), Ice Lake (Server), Lakefield, and the Nervana NNP-I. The microarchitecture was developed by Intel's...

en.wikichip.org

"Sunny Cove was originally unveiled by Intel at their 2018 architecture day. Intel originally intended for Sunny Cove to succeed Palm Cove in late 2017 which was intended to be the first 10 nm-based core and the proper successor to Skylake. "

Rocket lake is supposed to use the third iteration, willow cove, backported to 14nm to get the best of both worlds, more IPC and more clocks.

Intel Rocket Lake to use 14nm back-port of the Willow Cove core architecture

Recent leaks suggest that the ageing Skylake architecture won't last beyond 2020's Comet Lake

www.pcgamesn.com

End of the day, you gotta give Intel Kudos for their ++++ Nobody can ever beat them for all the ++++ in the product marketing name. I mean for the average consumer w/o technical knowledge..all that ++++++++++ must trigger some good childhood memories when teacher gives them ++++ for work well done.

Was there ever any + in any of their marketing?Forums and techsites are the only ones obsessed with it.

 

[Markfw]

Intel has the palm and sunny cove uarchs completed years ago and another few improvements on them.
Sunny features 20% more instruction units while other things are improved even more.It will be easily 20% faster per clock than skylake in anything that benchmarking sites are focusing on.Clocks will very probably be quite a bit lower than commetlake thou.
Sunny is intel's 10nm second iteration it was supposed to come out 2017 (to counter ZEN1) but there was no need to so they didn't release it.

Sunny Cove - Microarchitectures - Intel - WikiChip

Sunny Cove (SNC), the successor to Palm Cove, is a high-performance 10 nm x86-64 core microarchitecture designed by Intel for an array of server and client products, including Ice Lake (Client), Ice Lake (Server), Lakefield, and the Nervana NNP-I. The microarchitecture was developed by Intel's...

en.wikichip.org

"Sunny Cove was originally unveiled by Intel at their 2018 architecture day. Intel originally intended for Sunny Cove to succeed Palm Cove in late 2017 which was intended to be the first 10 nm-based core and the proper successor to Skylake. "

Rocket lake is supposed to use the third iteration, willow cove, backported to 14nm to get the best of both worlds, more IPC and more clocks.

Intel Rocket Lake to use 14nm back-port of the Willow Cove core architecture

Recent leaks suggest that the ageing Skylake architecture won't last beyond 2020's Comet Lake

www.pcgamesn.com

Was there ever any + in any of their marketing?Forums and techsites are the only ones obsessed with it.

So with all that good news you are posting, where are the chips ? We have Zen 3 coming this fall, and Intel has nothing to counter ?

 

[dullard]

Was there any + in any of their marketing?Forums and techsites are the only ones obsessed with it.

Proper marketing to consumers (as in advertisements to sell products)? no.
Tech notes and press releases, etc? Yes. Examples:
1) https://newsroom.intel.com/newsroom/wp-content/uploads/sites/11/2017/09/10-nm-icf-fact-sheet.pdf
2) https://www.intel.com/content/www/u...rocessors-and-chipsets/ice-lake/overview.html
3) https://newsroom.intel.com/image-ar...cloud-network-edge-and-pc-products/#gs.bxccf7

That said, 4 years into this problem, isn't it sad that people still feel the need to make posts about the number of plusses? It is as if adding a dollar sign to Micro$oft is now cool!

 

[traderjay]

I forgot, the 14 nm ++++++++++++++ is really similar to Honda's GT-R marketing. I heard the Type-R sticker increases HP by 0.5? For intel i guess each + is 2 degree in temp?

 

[lobz]

Intel has the palm and sunny cove uarchs completed years ago and another few improvements on them.
Sunny features 20% more instruction units while other things are improved even more.It will be easily 20% faster per clock than skylake in anything that benchmarking sites are focusing on.Clocks will very probably be quite a bit lower than commetlake thou.
Sunny is intel's 10nm second iteration it was supposed to come out 2017 (to counter ZEN1) but there was no need to so they didn't release it.

Sunny Cove - Microarchitectures - Intel - WikiChip

Sunny Cove (SNC), the successor to Palm Cove, is a high-performance 10 nm x86-64 core microarchitecture designed by Intel for an array of server and client products, including Ice Lake (Client), Ice Lake (Server), Lakefield, and the Nervana NNP-I. The microarchitecture was developed by Intel's...

en.wikichip.org

"Sunny Cove was originally unveiled by Intel at their 2018 architecture day. Intel originally intended for Sunny Cove to succeed Palm Cove in late 2017 which was intended to be the first 10 nm-based core and the proper successor to Skylake. "

Rocket lake is supposed to use the third iteration, willow cove, backported to 14nm to get the best of both worlds, more IPC and more clocks.

Intel Rocket Lake to use 14nm back-port of the Willow Cove core architecture

Recent leaks suggest that the ageing Skylake architecture won't last beyond 2020's Comet Lake

www.pcgamesn.com

Was there ever any + in any of their marketing?Forums and techsites are the only ones obsessed with it.

So you really believe Intel didn't release Sunny Cove in 2017 because they didn't need to? Talk about living under a rock. They can't even get it out in 2020 - and believe me they would really like to.

 

[beginner99]

Has process tech at the smaller nodes become so complicated that the number of people capable of advancing it, has shrunk dramatically and if you don't get some of those small handful of process tech geniuses, it won't matter how much money you throw at things?

That is exactly what I believe. And it doesn't apply to process tech only. Can be for seemingly trivial things but if you activley fire anyone being able to solve a problem (and rely on outsourcing problems) or having a "toxic" environment so that no competent person wants to work there, it's still managements fault. And people talk. If it's toxic, the good ones probably won't apply and/or intel isn't willing to pay enough for them to look over that.

Remember, we're always at the state of the art. The Wright bros were just as innovative as the latest designers.

First airplane: 2 people
Modern airplane: 100+ for design, 1000+ for implementation

It's a completely different ball game and if you don't get that you probably never worked in a large org with all it's proccesses and bureacracies rivaling the worst governments in inefficiency. "But the private sector is efficient and lean?" yeah lol.

 

[A///]

Intel has the palm and sunny cove uarchs completed years ago and another few improvements on them.
Sunny features 20% more instruction units while other things are improved even more.It will be easily 20% faster per clock than skylake in anything that benchmarking sites are focusing on.Clocks will very probably be quite a bit lower than commetlake thou.
Sunny is intel's 10nm second iteration it was supposed to come out 2017 (to counter ZEN1) but there was no need to so they didn't release it.

Sunny Cove - Microarchitectures - Intel - WikiChip

Sunny Cove (SNC), the successor to Palm Cove, is a high-performance 10 nm x86-64 core microarchitecture designed by Intel for an array of server and client products, including Ice Lake (Client), Ice Lake (Server), Lakefield, and the Nervana NNP-I. The microarchitecture was developed by Intel's...

en.wikichip.org

"Sunny Cove was originally unveiled by Intel at their 2018 architecture day. Intel originally intended for Sunny Cove to succeed Palm Cove in late 2017 which was intended to be the first 10 nm-based core and the proper successor to Skylake. "

Rocket lake is supposed to use the third iteration, willow cove, backported to 14nm to get the best of both worlds, more IPC and more clocks.

Intel Rocket Lake to use 14nm back-port of the Willow Cove core architecture

Recent leaks suggest that the ageing Skylake architecture won't last beyond 2020's Comet Lake

www.pcgamesn.com

Was there ever any + in any of their marketing?Forums and techsites are the only ones obsessed with it.

Right, and Intel also believed they could take their Netburst µarch to 10 Ghz.

The future of Intel's manufacturing processes

www.anandtech.com

The future of Intel's manufacturing processes

www.anandtech.com

I'm not pointing fun at Anand or his site then. I think we all swallowed Intel's BS with gleeful aspiration.

Intel may have finished up work on those designs years ago, but will they be viable in 3-4 years when they [hopefully] become mass produced? And then to what end will those be viable against future versions of Zen or whatever may come after Zen as AMD will be in far better financial shape and attracting engineers who want to advance the microprocessor field under x86?

Much like @Markfw I feel the same. Intel has nothing that makes anyone go wow. I guess if you want to push 14nm to its breaking point or some podunk broken process, then sure, it's stupendous.

 

[DrMrLordX]

@TheELF

It's almost like you are ignoring everything that's happened to Intel recently. They fired Murthy for God's sakes. They're ordering 180k 6nm wafers from TSMC. Ponte Vecchio is going to be produced on both TSMC 5nm and Intel 7nm (guffaw). It's a major shakeup. Intel has to start moving designs like Golden Cove and . . . whatever comes after that to processes from other foundries or processes they license/adapt from other foundries. There's going to be a scramble for enough wafers to maintain volume, and their gross margins may decline rapidly. AND it's going to take them time to make all these changes. Maybe not 5 years to move Golden Cove to something like TSMC 6nm, but it's going to take them 6-12 months, minimum. If they plan on adapting outside processes to their own fabs as part of a cross-licensing deal, it's going to take even more time to retool and adapt. They are in big trouble, and there's a lot of work ahead of them.