Intel Penryn

[RichUK]

Originally posted by: Intelia

Originally posted by: RichUK

Originally posted by: Intelia
I can see AMD and intel well over 6GHz by 2009

lol ... you make me laugh

EDIT: are you still a fool and think that Ghz mean everything, parallelism is the future

And you have know idea whats really going on

lol .. if thats supposed to mean that i dont know what i am talking about, ill think you'll find that you are very much mistaken, you on the other hand just don?t have a clue, you never have since you had joined. And you are just very mistaken in general, I.E reading Inquirer and believing everything it publishes about Intel, they hardly sound professional in their articles .. **shakes Head**

 

[Viditor]

Originally posted by: Intelia
Ummm...AMD has been producing sample 65nm chips for months now...try google.
Both Intel and AMD will be shipping 65nm chips next year, 45nm won't be production ready till at least the end of 2007, which means that it won't ship till 2008.

Post link of a fab tapout please.

1. Fabs don't have a tapeout, individual processor designs do.
2. Neither Intel nor AMD have announced a tapeout for their 65nm chips yet, though both have stated they have working silicon.

 

[Intelia]

Originally posted by: clarkey01

Originally posted by: Intelia
Duvie you know what I find interesting . When these are released the GHZ race will be back.

Referring to the 45nm cpu's

If there using a high IPC design like dothan there wont be a Ghz race. AMD have said (webber) that they will add pipelines and focus more on clock speed as well as tweaks to the memory controller in the future. I dont know why Intel doesnt put out higher clocked pentium M's. The seem to overclock well but everytime I see a speed bump its like 2.1 Ghz over 2 Ghz. The K8 see's 3 Ghz in Q1. People wanna argue that dothan is faster clock for clock (ever so slightly) but if AMD can get a bit of a gap in terms of Mhz then it doesnt count much.

The reason is Dothan is made for the laptops so its about power consumpsion.My husbands Pc has a Dothan that is running at 3GHz up from 2.23Ghz I believe. It is a water cooled chiller outfit . Temps set to run@ 20 degrees C in summer. 10 degreesC in the winter. So the dothans scale nicely.

 

[Intelia]

Originally posted by: Viditor

Originally posted by: Intelia
Ummm...AMD has been producing sample 65nm chips for months now...try google.
Both Intel and AMD will be shipping 65nm chips next year, 45nm won't be production ready till at least the end of 2007, which means that it won't ship till 2008.

Post link of a fab tapout please.

1. Fabs don't have a tapeout, individual processor designs do.
2. Neither Intel nor AMD have announced a tapeout for their 65nm chips yet, though both have stated they have working silicon.

http://www.theinquirer.net/?article=24932

Now 20% to 30% faster per clock is fast . I can't tell you how fast but David 3GHz dothan is fast. Conroe the desk top version will probably start at 2.5GHz and go up from their and thats being conservative

 

[JEDIYoda]

where`s Dothan when you need him....rofl

 

[phaxmohdem]

What AMD and Intel both fail to realize is that I have secretly developed a chip in my basement at 22nm that has no power leakeage, doesn't need a heatsink, has 16 cores @5.4GHz each, and each wafer can be made in an EasyBake Oven in under 5 minutes.

Now If I could just get these damn things to turn on

 

[Intelia]

HOW much$$$$$$$$$

 

[Pabster]

Originally posted by: JEDIYoda
where`s Dothan when you need him....rofl

LOL! I was thinking the same thing

 

[Intelia]

Originally posted by: Kensai

Originally posted by: Intelia
This post and the post to day and yesterday is just unfo i got off the web . I highly suspect your a coward hiding behind a keyboard
Hay richey intel has the Super PI record

I highly suspect you failed engligh too.
Yes, it is well known that the Pentium M holds the Super Pi record.

Ya you and me both

 

[Viditor]

Originally posted by: Intelia

Originally posted by: Viditor

Originally posted by: Intelia
Ummm...AMD has been producing sample 65nm chips for months now...try google.
Both Intel and AMD will be shipping 65nm chips next year, 45nm won't be production ready till at least the end of 2007, which means that it won't ship till 2008.

Post link of a fab tapout please.

1. Fabs don't have a tapeout, individual processor designs do.
2. Neither Intel nor AMD have announced a tapeout for their 65nm chips yet, though both have stated they have working silicon.

http://www.theinquirer.net/?article=24932

Now 20% to 30% faster per clock is fast . I can't tell you how fast but David 3GHz dothan is fast. Conroe the desk top version will probably start at 2.5GHz and go up from their and thats being conservative

Sorry, but that's an Inquirer article...could you show me the tape out announcement from Intel please? There are many levels of tapeout...

1. First tapeout...usually about 1 year from shipping
2. Many engineering tapeouts...these are tapeouts used as the product is tweaked and made ready for production...most samples are produced from these.

As an example, AMD was handing out dual core samples a year before shipping them. They ran at half speed, but gave OEMs a product to help them design with and to give feedback on the product before release. Intel follows the same protocols (unless there are extreme last minute changes expected, as in Prescott).
Itanium had 2+ years of tapeouts...

As to AMD's 65nm chips, remember that they don't need the heavy redesign that the Intel chips do. I doubt that we will see many tapeout announcements as the chip design will be basically the same one on a different manufacturing process. For example, you don't see tapeout announcements on clockspeed bumps either...
The 65nm production started on RAM chips in Q1, and Fab36 opens in October...

Yonah will be released at 2.16 GHz and will be 32bit only on a 667MHz FSB. We still don't know much about Conroe (will it be able to use both 64bit and HT, will it have a bottleneck on the FSB, etc...). It sounds quite promising, but of course so did Itanium and Prescott...

 

[ShadowBlade]

i bet amd will come back with a quad-core 44nm process

 

[clarkey01]

Originally posted by: ShadowBlade
i bet amd will come back with a quad-core 44nm process

65nm tech will see in quad cores in 2007 and it will go to 45nm tech too I believe.

One thing I dont get is this second coming of christ with Dothans offspring. No numbers or reviews are out. You cant just go into forums saying "Oh you AMD fanboys watch out, your goona die and fab 36 will fall". That hasnt been the tone of this thread but we see it all the time in pentium M related posts

I remember 2 years ago an Intel worker telling me that prescott was the final nail in AMD's coffin. I mean if Intel responds well and offers, a chaper, faster, cooler running chip than AMD which is all rounded (no weak FPU) then I have no reason to stay with AMD.

RnD and work in boston/DD/East fishkill continues. AMD are working constantly, something some of you like to pretend doesnt happen.

 

[Acanthus]

Originally posted by: Intelia

Originally posted by: clarkey01

Originally posted by: Intelia
Duvie you know what I find interesting . When these are released the GHZ race will be back.

Referring to the 45nm cpu's

If there using a high IPC design like dothan there wont be a Ghz race. AMD have said (webber) that they will add pipelines and focus more on clock speed as well as tweaks to the memory controller in the future. I dont know why Intel doesnt put out higher clocked pentium M's. The seem to overclock well but everytime I see a speed bump its like 2.1 Ghz over 2 Ghz. The K8 see's 3 Ghz in Q1. People wanna argue that dothan is faster clock for clock (ever so slightly) but if AMD can get a bit of a gap in terms of Mhz then it doesnt count much.

The reason is Dothan is made for the laptops so its about power consumpsion.My husbands Pc has a Dothan that is running at 3GHz up from 2.23Ghz I believe. It is a water cooled chiller outfit . Temps set to run@ 20 degrees C in summer. 10 degreesC in the winter. So the dothans scale nicely.

Supercooling =/= scaling.

I can get a wilamette pentium 4 to do 2.8ghz... does that mean they ever scaled that far?

 

[Intelia]

David doesn't go for max O/C he goes for the sweet spot with stability. He had the 2.23GHZ stable @3.1 GHZ but said he took an all round performanc hit (memory controller he believes). He also says that the dothan2.23GHz is very stable on air @2.8. . This is very good for a processor that is operating outside its design perimators. Sounds good to me . I won't even pretend that I understand it as well as he does. But I can grassip the concept.

 

[Duvie]

Originally posted by: Intelia
David doesn't go for max O/C he goes for the sweet spot with stability. He had the 2.23GHZ stable 2@3.1 GHZ but said he took an all round performanc hit (memory controller he believes). He also says that the dothan2.23GHz is very stable on air @2.8. . This is very good for a processor that is operating outside its design perimators. Sounds good to me . I won't even pretend that I understand it as well as he does. But I can grassip the concept.

I WOULD LIKE TO SEE SCREEN SHOTS...

Memory controller on a Dothan??

 

[Acanthus]

I dont think you understand what i am trying to say.

Under supercooled conditions, you cannot in any way reliably predict how far a chip will scale, based on the results of the supercooling.

Supercooling allows clockspeeds that are not possible on air cooling, because air cooling can never go below ambient temps.

Exotic cooling systems, in your case, the waterchiller on the Dothan, do not in any way represent how far the CPU can or will scale in clockspeed.

 

[pm]

Some fab terminology (at Intel anyway, but most of these are industry-wide):

tape-in : the layout database is frozen and begins the check-out process looking for issues (such as metal density issues among many others). This is done by the team who designed the chip.
tape-out : the layout database has been checked the team and is ready for manufacturing. In the old days, the tape reel would be shipped to the mask shop. Nowadays, the files are transferred. This is also done by the team who designed the chip.
fracture : the layout database is turned into mask layers. This is done by a mask team, mask shop, or fab company
first silicon/A0 silicon/post-silicon : the very first revision of a chip
sampling : an early "beta" chip that is shipped to OEM customers for early team and system check-out
product-shipping/product ready : in theory, this means that you can buy it on the street.
stepping : a revision of a mask-set. Could be thought of as something akin to a new version of software. Steppings at Intel are designated, letter/number, such as A0, B2, C1, etc. The letter indicates a computer mask revision (all, or nearly all, layers changed), a number indicates only a few layers changed - typically metal layers. A design could go from A0 -> B0 -> C0, but more commonly goes A0 -> A1 -> A2 -> B0 or something similar. Mask sets are expensive, and the more layers changed the more time it takes to get the silicon through the fab.

So, it's not possible for anyone to have a chip without having taped it out. The mask set is required to manufacture it.

As far as comments on 45nm, etc. It is too early for anyone to conclude much of anything about 45nm. Charlie is a smart guy but he's stretching in this article. No matter who is source is, no one knows what 45nm is going to look like yet. The switch to "3D gates" will be a one-shot massive improvement in leakage, but this will just reset the leakage back to the days of 0.18um silicon in terms of leakage. Similarly a switch to "high-K" gates would be a one-time massive improvement in leakage. Either one will be a huge change to the semiconductor design, manufacturing, and - in the case of "3D gates" - the semiconductor CAD industry. It is almost certain that one of these two will occur in the 45nm or 30nm timeframe, but neither one is a "sure thing" at this point. Once the change has been made, future process steps will result in further increases in leakage... the clock will be reset back a bit, but it will start ticking down again. Neither is a permanent fix for the leakage problem, and both introduce a whole new level of complexity in and of themselves.

 

[Sentential]

Fantastic reply as always. That does make a great deal of sense.

 

[Intelia]

I was referring to the M/B N. B. controller. Duvie You well see snap shots as I said befor when Zinn2b Has the system that caused the flame war he got banned for. When will that be. CrossFire M/B from ATI. R580 Video Cards Conroe dual core CPU.

I have begged him to let me post pics of the system he built its fantastic.(not the performance ) The case is actually a desk built out of aluminum. 6 legs that act as passive water coolers . A midgit race car rad. Installed as the back of the inclosed cabinet that houses the 2 power supplies and the Tec Chiller(300 watts cooling 600watts heating)

Inorder to draw Air threw the RAD he installed a honywell air cleaner . Partitioned the cabibet so that the air intake(threw rad.) and the discharge (Air over the Power/supplies)are completely sealed off from each other. The 2 pumps and water manifold are also in the exhaust part of the cabinit.

Than the desk itself is black powder coated, The backstop houses the 24"LCD
and the Mother/Board. the water cooling cools the cpu ( Lighted Innovatek V6water Block)
Gpu X800xtpe (lighted innovatek) N/B (Innovatek) water cooled H/D dual Raptors(hidden) Mossfit water cooler(he Built). All the water lines are Braided Stainless steal with AN fitting.

The Display M/B backstop and desktop are covered with Tempered Glass so you see the M/B with lighted coolers and the extremely professonal plumbing job and the wiring is almost invisiable.

David Is very proud of it but will not show it till the Crossfire board and the Intel CPU he has been waiting for are available . The company he is working with has all the specs. required to manufactor the parts and David wants to market it as the most extreme Gamer available fully Gaurenteed 3years. So that means its will have a high O/C but not accesable. It well also be marketed with 1 complete upgrade .THATS M/B CPU and DUAL GPU'S. Davids cost to develop this desk PC was over $10'000. YOU I PROMISE DUVIE WILL SEE IT AS SOON AS ATI AND INTEL HAVE HIS PARTS>

 

[RichUK]

Originally posted by: pm
Some fab terminology (at Intel anyway, but most of these are industry-wide):

tape-in : the layout database is frozen and begins the check-out process looking for issues (such as metal density issues among many others). This is done by the team who designed the chip.
tape-out : the layout database has been checked the team and is ready for manufacturing. In the old days, the tape reel would be shipped to the mask shop. Nowadays, the files are transferred. This is also done by the team who designed the chip.
fracture : the layout database is turned into mask layers. This is done by a mask team, mask shop, or fab company
first silicon/A0 silicon/post-silicon : the very first revision of a chip
sampling : an early "beta" chip that is shipped to OEM customers for early team and system check-out
product-shipping/product ready : in theory, this means that you can buy it on the street.
stepping : a revision of a mask-set. Could be thought of as something akin to a new version of software. Steppings at Intel are designated, letter/number, such as A0, B2, C1, etc. The letter indicates a computer mask revision (all, or nearly all, layers changed), a number indicates only a few layers changed - typically metal layers. A design could go from A0 -> B0 -> C0, but more commonly goes A0 -> A1 -> A2 -> B0 or something similar. Mask sets are expensive, and the more layers changed the more time it takes to get the silicon through the fab.

So, it's not possible for anyone to have a chip without having taped it out. The mask set is required to manufacture it.

As far as comments on 45nm, etc. It is too early for anyone to conclude much of anything about 45nm. Charlie is a smart guy but he's stretching in this article. No matter who is source is, no one knows what 45nm is going to look like yet. The switch to "3D gates" will be a one-shot massive improvement in leakage, but this will just reset the leakage back to the days of 0.18um silicon in terms of leakage. Similarly a switch to "high-K" gates would be a one-time massive improvement in leakage. Either one will be a huge change to the semiconductor design, manufacturing, and - in the case of "3D gates" - the semiconductor CAD industry. It is almost certain that one of these two will occur in the 45nm or 30nm timeframe, but neither one is a "sure thing" at this point. Once the change has been made, future process steps will result in further increases in leakage... the clock will be reset back a bit, but it will start ticking down again. Neither is a permanent fix for the leakage problem, and both introduce a whole new level of complexity in and of themselves.

pm - Excellent reply, thank you.

EDIT: just a quick question, when the ?stepping? changes, what does this usually entail i.e. what changes are made to the core, are they major changes or slight tweaks, and what would be the purpose, would it be to increase yields for further clock speeds further down the line, faults in the original design etc?

Thanks,

RichUK

 

[Duvie]

Originally posted by: RichUK

Originally posted by: pm
Some fab terminology (at Intel anyway, but most of these are industry-wide):

tape-in : the layout database is frozen and begins the check-out process looking for issues (such as metal density issues among many others). This is done by the team who designed the chip.
tape-out : the layout database has been checked the team and is ready for manufacturing. In the old days, the tape reel would be shipped to the mask shop. Nowadays, the files are transferred. This is also done by the team who designed the chip.
fracture : the layout database is turned into mask layers. This is done by a mask team, mask shop, or fab company
first silicon/A0 silicon/post-silicon : the very first revision of a chip
sampling : an early "beta" chip that is shipped to OEM customers for early team and system check-out
product-shipping/product ready : in theory, this means that you can buy it on the street.
stepping : a revision of a mask-set. Could be thought of as something akin to a new version of software. Steppings at Intel are designated, letter/number, such as A0, B2, C1, etc. The letter indicates a computer mask revision (all, or nearly all, layers changed), a number indicates only a few layers changed - typically metal layers. A design could go from A0 -> B0 -> C0, but more commonly goes A0 -> A1 -> A2 -> B0 or something similar. Mask sets are expensive, and the more layers changed the more time it takes to get the silicon through the fab.

So, it's not possible for anyone to have a chip without having taped it out. The mask set is required to manufacture it.

As far as comments on 45nm, etc. It is too early for anyone to conclude much of anything about 45nm. Charlie is a smart guy but he's stretching in this article. No matter who is source is, no one knows what 45nm is going to look like yet. The switch to "3D gates" will be a one-shot massive improvement in leakage, but this will just reset the leakage back to the days of 0.18um silicon in terms of leakage. Similarly a switch to "high-K" gates would be a one-time massive improvement in leakage. Either one will be a huge change to the semiconductor design, manufacturing, and - in the case of "3D gates" - the semiconductor CAD industry. It is almost certain that one of these two will occur in the 45nm or 30nm timeframe, but neither one is a "sure thing" at this point. Once the change has been made, future process steps will result in further increases in leakage... the clock will be reset back a bit, but it will start ticking down again. Neither is a permanent fix for the leakage problem, and both introduce a whole new level of complexity in and of themselves.

pm - Excellent reply, thank you.

EDIT: just a quick question, when the ?stepping? changes, what does this usually entail i.e. what changes are made to the core, are they major changes or slight tweaks, and what would be the purpose, would it be to increase yields for further clock speeds further down the line, faults in the original design etc?

Thanks,

RichUK

pretty much sums up why he is elite...

 

[pm]

just a quick question, when the ?stepping? changes, what does this usually entail i.e. what changes are made to the core, are they major changes or slight tweaks, and what would be the purpose, would it be to increase yields for further clock speeds further down the line, faults in the original design etc?

In theory, in a "letter" stepping, you could do anything you wanted. You could completely change the chip entirely. In reality, though, the goal is to get closer to shipping so each stepping usually entails fewer major changes than the ones prior to it. The goal is to iterate to a shippable product, so risk is minimized... and the more changes there are and the more significant the changes, the more there is a chance that someone messes up and requires another stepping to fix their mistake - thus essentially "wasting" a stepping. The money is not the biggest part of this equation... it's more slipping the schedule. It takes a significant amount of time to make a change to the database, tape-out a revision, fracture it, and then fab the design, then sort the parts, assemble them (put them in packages) and then test them to see how you did. A dead stepping (in some parts of the industry referred to as a "Dead Rat") - of which, to be honest, I can't ever remember one happening on any project that I have ever worked on - will slip a schedule substantially and cost an extra mask set, plus the space in fab that was used by it. A lot of opportunity cost is lost.

A long answer to a short question... you could make any change you want on a stepping, but usually they are minor. Common changes are fixes to logic bugs, speedpath fixes (to improve speed/bin split) and yield improvements (ie. manufacturability, marginality fixes). Lesser common changes would be microarchitectural fixes (performance fixes), fixes for reliability issues and fixes to improve testability.

Thanks for the compliments.

 

[RichUK]

Originally posted by: pm

just a quick question, when the ?stepping? changes, what does this usually entail i.e. what changes are made to the core, are they major changes or slight tweaks, and what would be the purpose, would it be to increase yields for further clock speeds further down the line, faults in the original design etc?

In theory, in a "letter" stepping, you could do anything you wanted. You could completely change the chip entirely. In reality, though, the goal is to get closer to shipping so each stepping usually entails fewer major changes than the ones prior to it. The goal is to interate to a shippable product, so risk is minimized... and the more changes there are and the more significant the changes, the more there is a chance that someone messes up and requires another stepping to fix their mistake - thus essentially "wasting" a stepping. The money is not the biggest part of this equation... it's more slipping the schedule. It takes a significant amount of time to make a change to the database, tape-out a revision, fracture it, and then fab the design, then sort the parts, assembly them (put them in packages) and then test them to see how you did. A dead stepping (in some parts of the industry referred to as a "Dead Rat") - of which, to be honest, I can't ever remember one happening on any project that I have ever worked on - will slip a schedule substantially and cost an extra mask set, plus the space in fab that was used by it. A lot of opportunity cost is lost.

A long answer to a short question... you could make any change you want on a stepping, but usually they are minor.

Thanks for the compliments.

Thanks for all the info pm, this has helped me and im sure others, properly understand the terminology and the process involved.

Thanks,

RichUK

 

[thecoolnessrune]

I don't believe anything from The Inquirer.

 

[Acanthus]

Originally posted by: Intelia
I was referring to the M/B N. B. controller. Duvie You well see snap shots as I said befor when Zinn2b Has the system that caused the flame war he got banned for. When will that be. CrossFire M/B from ATI. R580 Video Cards Conroe dual core CPU.

I have begged him to let me post pics of the system he built its fantastic.(not the performance ) The case is actually a desk built out of aluminum. 6 legs that act as passive water coolers . A midgit race car rad. Installed as the back of the inclosed cabinet that houses the 2 power supplies and the Tec Chiller(300 watts cooling 600watts heating)

Inorder to draw Air threw the RAD he installed a honywell air cleaner . Partitioned the cabibet so that the air intake(threw rad.) and the discharge (Air over the Power/supplies)are completely sealed off from each other. The 2 pumps and water manifold are also in the exhaust part of the cabinit.

Than the desk itself is black powder coated, The backstop houses the 24"LCD
and the Mother/Board. the water cooling cools the cpu ( Lighted Innovatek V6water Block)
Gpu X800xtpe (lighted innovatek) N/B (Innovatek) water cooled H/D dual Raptors(hidden) Mossfit water cooler(he Built). All the water lines are Stainless steal with AN fitting.

The Display M/B backstop and desktop are covered with Tempered Glass so you see the M/B with lighted coolers and the extremely professonal plumbing job and the wiring is almost invisiable.

David Is very proud of it but will not show it till the Crossfire board and the Intel CPU he has been waiting for are available . The company he is working with has all the specs. required to manufactor the parts and David wants to market it as the most extreme Gamer available fully Gaurenteed 3years. So that means its will have a high O/C but not accesable. It well also be marketed with 1 complete upgrade .THATS M/B CPU and DUAL GPU'S. Davids cost to develop this desk PC was over $10'000. YOU I PROMISE DUVIE WILL SEE IT AS SOON AS ATI AND INTEL HAVE HIS PARTS>

So youre saying that "david" went with one of the most inefficient and expensive cooling systems out there (watechiller), and wants to bring it to market. He has it and it performs great, but he wont show it off until he gets new parts for it. Oh and theres about 1400 different aluminum cases out right now.