Hmm. The die is actually quite thick.
Looks like there should be some scope for lapping of the actual die. I wonder how thin you could get it before you start to compromise the structure of the circuits.
Anyone want to donate an i7 for testing purposes?
Actually they do "thin" the wafer and the die considerably prior to packaging.
It reaches a point where the wafer/die get thin enough that their mechanical strength and rigidity can be compromised by handling and the process of packaging itself (mounting the die on the CPU PCB, not "packaging" as in shoving it into the retail box for show on the shelf

).
Most modern chips get thinned to the order of a few hundred microns (0.1-0.2mm), with some of the more extreme products being thinned to 50-80 microns (0.05mm - 0.08mm) for die-stacking in Nand packages and so on.
edit: for reference, a wafer is usually 800micron thick (0.8mm), some can be twice as thick depending on the venfor.