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Intel outlines plan to improve performance on old software

say still in research stage. may or may not see actual product based on it. but good to see intel doing something about the slow to catch up threaded software world.
 
It sounds like a great idea. Why do they call it Anaphase? What's wrong with Interphase,Prophase,Metaphase or Telophase? LOL
 
Idontcare said:
Kudos to Intel though for publishing the relevant info in a pay-to-see journal :thumbsup:
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Maybe I'm just confused, but the full paper is free to read? Or do you mean some other source I've overlooked, just scanned through the paper.
 
Idontcare said:
Anaphase (a stage of mitosis) does sound intriguing by the details given in the published article linked above by Voo.
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Ya its the same paper . Both are $19. I just thought the overview on this was more relavent.

Its the P-Slices that have my interest . That would be in effect Like But perhaps not the same as . The Prefix of VEX. For use with all SSE II commands and more demanding Prefixs for all other SSE code/ Or P- Slices
 
Nemesis 1 said:
.

Ya its the same paper . Both are $19. I just thought the overview on this was more relavent.

Its the P-Slices that have my interest . That would be in effect Like But perhaps not the same as . The Prefix of VEX. For use with all SSE II commands and more demanding Prefixs for all other SSE code/ Or P- Slices
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You have moments of such poignant lucidity, Nemesis, that even I am reduced to reverence as I ponder the implications of that which your keyboard has brought forth...let me think about this for a bit.

JWade said:
wasnt there a bit ago talk of AMD doing this and everone was saying it wouldnt matter/do any good?
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I believe you are referring to early speculation on "clustering" spawned by dresdenboy's blog wherein he suggested the FPU units assigned to each bulldozer module could be operated in a "ganged" mode to make certain instructions operate faster if the module wasn't currently tasked with computing two threads at that time.

Thus under low thread count situation there was the postulated possibility that individual threads within a module could see a performance boost.

What remains to be seen is whether any of the postulates are actually on the drawing board of the bulldozer architecture.

Consider how long hyperthreading had been on the drawing board, in the patents, and in functional silicon before Intel finally felt confident enough in its validation protocols to enable the feature in sellable products.

The version of clustering envisioned by Matthias (dresdenboy) could actually be there and yet we won't see it made available until Bulldozer 2 or some such.

And yes, without doubt, if there are two sides of a coin then you are going to find people who prefer one side over the other. Such is nature, she's a chiral bitch sometimes.
 
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