Discussion Intel Nova Lake in H2-2026: Discussion Threads

[511]

Perhaps, but can it do that in a tablet/T&L form factor like Strix Halo can?

It can tbh it's weird though TSMC CPU Tile and Intel iGPU Tile

 

[poke01]

MoP also saves board space. It is the best way of incorporating soldered memory, the only reason you don’t is cause of cost reasons.

 

[branch_suggestion]

MoP also saves board space. It is the best way of incorporating soldered memory, the only reason you don’t is cause of cost reasons.

Well yeah, LNL has awful margins for a premium part.
You have to buy and supply the memory yourself when you do MoP, OEMs prefer supplying memory themselves.

 

[Joe NYC]

NVL-AX does not have a hope of beating full fat Medusa Halo at any workload.

Lunar Lake is bearing Strix Halo 47:1
47 Lunar Lake laptop models for sale vs. 1 for Strix Halo

If nothing changes, we can expect the same ratio of OEM laptops on the market.

 

[Joe NYC]

Well yeah, LNL has awful margins for a premium part.
You have to buy and supply the memory yourself when you do MoP, OEMs prefer supplying memory themselves.

That is just a screwed up mindset of Intel - to chase Gross Margins. Intel closed or sold off number of divisions because they could not reach 50% Gross Margin.

New AMD CFO said on several occasions that she likes "margin dollars" just as much as the percentage. So it would not be a problem at all for AMD finance people.

The problem is the mindset of people who set the product specs trying to cater to OEM desires, and they go by what OEMs tell them and AMD takes seriously what OEMs say.

In the meantime, what OEMs do is complete opposite of what they tell AMD.

 

[Win2012R2]

MoP also saves board space. It is the best way of incorporating soldered memory, the only reason you don’t is cause of cost reasons.

It dropped margins, and stock market wants high gross margin, only Apple (and Nvidia) can take commodity cheap RAM and sell it with crazy premium.

I also doubt OEMs liked the idea being cut off their option to charge extra for more RAM

That is just a screwed up mindset of Intel - to chase Gross Margins.

But they have to do it, otherwise stock will go to zero

So it would not be a problem at all for AMD finance people.

Yeah it would be, it's the key element in quarterly reports, and AMDs stock got far more to lose than Intels

 

[Win2012R2]

If they would target only scalar code (APX) it at least seems doable. Diassemble the binary on first run, find all the stack push/pop and spills, replace if possible with additional registers, compile back. That at least seems managable if the calling conventions remian unchanged.

Intel's projection of improvements from source code compile is in the region of 10%, but compiler sees a lot of stuff and can use PGO data, disassembly back is far harder to get good view, they can replace small things like push2/pop2 on doubles, but that's hardly going to make huge difference.

So how much can this approach deliver - obviously less than source compile, so 5%?

 

[Joe NYC]

It dropped margins, and stock market wants high gross margin, only Apple (and Nvidia) can take commodity cheap RAM and sell it with crazy premium.

I also doubt OEMs liked the idea being cut off their option to charge extra for more RAM


But they have to do it, otherwise stock will go to zero

Yeah it would be, it's the key element in quarterly reports, and AMDs stock got far more to lose than Intels

The math is:
Scenario 1: You price a product at $20 hoping to make $10 by selling 1
Scenario 2:. pricing it at $15 and making the same $10 by selling 2

You don't go out of business under Scenario 2, but might under Scenario 1 if you just don't sell the 1 and end up shutting down or selling the division.

The AMD CFO (Jean Hu) likes counting the big bucks, and when has the big bucks on hand, and stock goes down, she repurchases a lot of the stock on the cheap. It just happened a couple of months ago.

OTOH, we have a history of Intel tying its hands by the high margin desire, and even the new CEO (LBT) said he is not going to approve new products that don't have the high gross margin forecast...

 

[Win2012R2]

The math is:
Scenario 1: You price a product at $20 hoping to make $10 by selling 1
Scenario 2:. pricing it at $15 and making the same $10 by selling 2

This isn't Wallmart, in a high flying high tech company is expected to deliver 50%+ gross margins, if not then it's in a big problem and stock goes into crapper, CEO gets fired, credit rating gets cut, employee stock options under water, you can't hire new hot people and instead they leave to hotter start ups.

So yes, it's Scenario 1 or might as well close the shop down.

There might be possible alternative however - sell on paper SoC with MoP support but without actual memory, and buyer pays separately for memory and then it gets installed etc, this way margins are intact. Problem is that I don't OEMs like this MoP model in the first place.

she repurchases a lot of the stock on the cheap. It just happened a couple of months ago.

Yeah we know how that worked out for Intel. These stock buys should be illegal market manipulation anyway.

 

[MS_AT]

Intel's projection of improvements from source code compile is in the region of 10%,

Depending which projections you mean. I haven't seen performance projections, intel's original announcement did not contain them. Just reductions of loads and stores iirc.

compiler sees a lot of stuff and can use PGO data, disassembly back is far harder to get good view

Sure, but you are not going to reoptimize the code just correct it since you know you have 16 extra registers compiler did not know about when compiling original code.

What I was referring to is that under current calling conventions (so the "old" ones) callee has to save some registers as a part of the calling convention contract. Assuming worst case like this on Windows (https://learn.microsoft.com/en-us/cpp/build/x64-software-conventions?view=msvc-170)

0: 41 57 push r15
2: 41 56 push r14
4: 41 55 push r13
6: 41 54 push r12
8: 56 push rsi
9: 57 push rdi
a: 55 push rbp
b: 53 push rbx

if you replace in the binary uses of rbx-r15 in the function with r16-r24, you can eliminate all those push operations (and corresponding pops at then end). You don't violate the old calling convention as the old calling convention will never use r15-r31, as it does not know about them. You need to care though if you do a system call as OS can be APX aware. But this should be doable. Replacing temporary stack buffers this way also should be possible if you prove they are local to the function. The benefit? You interact with the cache less, leaving more space for other things. How much it's worth it? That depends on the app in question, if they are really trying to do something like that it must at least have a measurable effect on average.

So how much can this approach deliver - obviously less than source compile, so 5%?

That's 5% you gain for "free", that allows you to catch up to competition. Assuming you can make it work. And even if technically feasible, it might be that anti cheat engines and other things would not like you to mess with the binary.

 

[branch_suggestion]

Lunar Lake is bearing Strix Halo 47:1
47 Lunar Lake laptop models for sale vs. 1 for Strix Halo

If nothing changes, we can expect the same ratio of OEM laptops on the market.

LNL and Strix Halo are not competitors.

 

[adroc_thurston]

Lunar Lake is bearing Strix Halo 47:1
47 Lunar Lake laptop models for sale vs. 1 for Strix Halo

these are completely different products targeting different market niches?

 

[reb0rn]

del

 

[DavidC1]

That is just a screwed up mindset of Intel - to chase Gross Margins. Intel closed or sold off number of divisions because they could not reach 50% Gross Margin.

New AMD CFO said on several occasions that she likes "margin dollars" just as much as the percentage. So it would not be a problem at all for AMD finance people.

The problem is the mindset of people who set the product specs trying to cater to OEM desires, and they go by what OEMs tell them and AMD takes seriously what OEMs say.

In the meantime, what OEMs do is complete opposite of what they tell AMD.

Intel: Gives up Lunarlake's superior product because of margins.
Also Intel: Says foundry is very important, that theirs is superior and other companies should use them.
Same Intel: *Proceeds to sneakily move 90% of compute tiles in Novalake to TSMC

Tan wants high margins right?

Here's the easiest way. Right now the Intel Foundry is wasting money, because no one is using them. So, force Intel Product to use Intel Foundry. More important than segment margins, the company margins will improve drastically because Foundry will be utilized. Intel is still a massive user of silicon. 250 million PCs a year is massive. Plus server.

 

[igor_kavinski]

Here's the easiest way. Right now the Intel Foundry is wasting money, because no one is using them. So, force Intel Product to use Intel Foundry. More important than segment margins, the company margins will improve drastically because Foundry will be utilized. Intel is still a massive user of silicon. 250 million PCs a year is massive. Plus server.

List of Intel manufacturing sites - Wikipedia

en.wikipedia.org

Looking at that, they seem to have just two Intel 7 fabs, one Intel 3/4 fab and just one 18A fab.

I think the dirty and probably open secret is that none of their leading edge fabs have yields good enough for the right to even exist.

 

[QuickyDuck]

Ya Pat said he bet the whole company on 18A but actually he didn't.

 

[DavidC1]

Ya Pat said he bet the whole company on 18A but actually he didn't.

What likely happened is that he spent all that money based on the erroneous conclusion(or failed promises to him) that lockdowns would be infinite, thus people around the world forced to stay at home and be computer addicts forever. Then it was a transitory goal to use 3rd party fab, but the promises ended, thus the profit collapsed, and now we're stuck with stupid ideas like hobbling Apple/Nvidia to use Intel when in reality it's better off forcing Intel to use their own foundry instead.

 

[igor_kavinski]

The really lame thing Intel did was alienating AMD to such an extent that they are going to let Intel rot rather than give them any foundry business. It's impossible to trust someone who has always tried everything in their power to stifle and suffocate you with all manner of backhanded tactics. I read some Linkedin post from an AMD division head saying that their biggest challenge was trying to undo the damage caused by Intel marketing people who fed absolute white lies to customers about AMD's product quality and reliability.

 

[reb0rn]

Thats was not a lie AMD had a lots of defect always, up to let say intel gen 4 cpu AMD was pure garbage in defect area... but then no one cared as it was under 1-2%... up to that date i never seen decet intel cpu