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Discussion Intel Nova Lake in H2-2026: Discussion Threads

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511 said:
NVL Mobile was Q1 27 though
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Yeah and Z6 mobile was as well. Still client is not even Intel's priority. No more delays allowed for Rapids unless they mess up again. But I guess it isn't a big deal if all their competitors are lazing around too.
 
gdansk said:
Yeah and Z6 mobile was as well. Still client is not even Intel's priority. No more delays allowed for Rapids unless they mess up again. But I guess it isn't a big deal if all their competitors are lazing around too.
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DC has been late again and again for generations in past 6-7 Years.
 
511 said:
DC has been late again and again for generations in past 6-7 Years.
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If we're talking about the past, not products previously planned for this year, then that also applies to every client part since Broadwell. And cumulatively slipping schedules is why Intel is where it is.
The point is apparently Intel made a choice to further delay the surviving, lead NVL products though not to further delay the surviving DMR products.
 
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gdansk said:
If we're talking about the past, not products previously planned for this year, then that also applies to every client part since Broadwell. And cumulatively slipping schedules is why Intel is where it is.
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Well 10nm happened which just botched the company but even after fixing that DC has been screwing around so much client not so much
gdansk said:
The point is apparently Intel made a choice to further delay the surviving, lead NVL products though not to further delay the surviving DMR products.
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DMR is a H2 26 product and NVL K SKU is the only thing launching this year i have not heard otherwise
 
ondma said:
Well, after the instability issues of RL and the underwhelming Arrow Lake, their reputation is pretty suspect. They cant afford another screw up with NL, so better to wait until everything is hopefully sorted out. I say "hopefully" because I just dont trust Intel to deliver after the last 3 generations. It IS disappointing though to have both NL and Z6 delayed. If they could have delivered a good product, especially for gaming with the bLLC, it would have given their reputation a shot in the arm and allowed them to get a jump on AMD.
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Well the uncore is noticeably better on Pantherlake in every way. Lower latency L3(potentially MLC), faster memory, higher bandwidth. And you just mentioned two messed up generations, not 3. Okay, Lunarlake isn't too great either but it's doing ok for laptops and it's essentially same gen as Arrowlake.
 
coercitiv said:
Meteor Lake
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See, Raptorlake was a different thing from the other two though. Meteorlake and Arrowlake underperformed performance wise, they weren't broken. And Pantherlake, already fixes those mistakes. For Novalake to be like Arrowlake, they would have to regress, which is possible but not always.
 
DavidC1 said:
See, Raptorlake was a different thing from the other two though. Meteorlake and Arrowlake underperformed performance wise, they weren't broken.
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@ondma mentioned "instability" for RL and "underwhelming" for ARL, and then expressed lack of faith in Intel's capability to deliver after the last 3 generations. There was no mention of 3 broken or "messed up generations. That being said, I do agree that Panther and Lunar Lake are proof enough that Intel can execute much better than they did with ARL. Personally I'm cautiously optimistic about NVL.
 
DavidC1 said:
Well the uncore is noticeably better on Pantherlake in every way. Lower latency L3(potentially MLC), faster memory, higher bandwidth. And you just mentioned two messed up generations, not 3. Okay, Lunarlake isn't too great either but it's doing ok for laptops and it's essentially same gen as Arrowlake.
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I wonder if anyone has tested that Darkmont does indeed have lower L2 cache latency as well.

Interesting to see if off tile improves with NVL as well.It would need to, with LPE cores being off tile and Intel seeming to prefer an E and LPE core first strategy for distribution of work
 
MoogleW said:
I wonder if anyone has tested that Darkmont does indeed have lower L2 cache latency as well.

Interesting to see if off tile improves with NVL as well.It would need to, with LPE cores being off tile and Intel seeming to prefer an E and LPE core first strategy for distribution of work
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The LP-E are on the same tile as IMC in NVL it's the Compute tile that's seperate
 
I have a 9950X and it's a great processor. That being said Arrow Lake was hammered at launch and it was supposed to be more performant than Zen 5 since it came after Zen 5 as well as the fact that it fell behind Raptor Lake in gaming. Okay I get that, Intel is still catching up. The reasons I went with the 9950X vs. 285K were overall application performance, the longevity of AMD platforms (sockets), and my confidence in Intel was shaken after having to return two Raptor Lake processors, which were not overclocked yet began to require more and more voltage to reach the same frequencies.

But let's be honest, Arrow Lake is competitive with Zen 5 outside of gaming and competing against the X3D variants. Also I've seen the 245K at Microcenter as low as $200, that's a smoking deal, as is the 265K for $260.

So where are we? AMD and Intel are competitive with AMD having an edge because Intel's latest couldn't top AMD's product that was already on shelves. That is a win for AMD, but not a KO. It also puts AMD in a better position when the bell rings for the next round.

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gdansk said:
Still client is not even Intel's priority. No more delays allowed for Rapids unless they mess up again. But I guess it isn't a big deal if all their competitors are lazing around too.
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Yeah, they did mess up on both Server and Fab side priorities over 2 Quarters ago, some of which could have more long term consequences despite the uptrend in Server CPU demand. "Client" should still be a high priority for Intel(that's most of their earnings) despite the Earnings messaging but let's see.
 
So we got 9950X3D2 after all, as expected. I guess this means NVL-S with 2x bLLC is sealed too.

The target is still open. But it paves the way for games utilizing more threads having access to fast cache, showing the direction for PS6 and XBOX next gen (project Helix / Magnus).
 
Fjodor2001 said:
But it paves the way for games utilizing more threads having access to fast cache
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Not a single game on the their slides AND it seems to be configured for more power against expectations. The dumb SKU to milk bozo gamers is here and you're celebrating. Nice. Now what it does pave the way for is some people who want Linux workstations to have uniform performance but only if it has two top bin CCDs. It might not. We'll see.
 
gdansk said:
Not a single game on the their slides AND it draws more power against expectations. The dumb SKU to milk bozo gamers is here and you're celebrating. Nice.
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Its intention is to pave the way for games using more threads having access to fast cache. Agreed not utilized by many games now, but in the future. What other purpose would the expensive 2x fast cache available for more threads have.
 
Fjodor2001 said:
Its intention is to pave the way for games using more threads having access to fast cache. Agreed not utilized by many games now, but in the future. What other purpose would the expensive 2x fast cache available for more threads have.
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Because in theory this configuration has slightly higher IPC and performance per watt. And well, I suspect until there is a unified big LLC it is of very dubious utility/benefit for games.
For this part you still will very much want your working set to be within 1 CCD L3.
 
gdansk said:
Because in theory this configuration has slightly higher IPC and performance per watt.
And well, I suspect until there is a unified big LLC it is of very dubious utility/benefit for games.
For this part you still will very much want your working set to be within 1 CCD L3.
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Historically the main purpose of the X3D cache on DT has been to increase performance and lower latency for gaming use cases.
 
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