Discussion Intel Nova Lake in H2-2026: Discussion Threads

[Io Magnesso]

In the first place, many people have the illusion that using TSMC N2 will be better...
If it's not good from design, you have to understand that it's no good no matter what process you use.
You are too illusion Let's see reality

 

[Io Magnesso]

You know that N1X chip from Nvidia might not actually be behind PTL then.

Well, which way, NVIDIA's SoC will also have a problem

 

[Io Magnesso]

Should read the article and it's total nonsense like his previous TSMC Intel merger.

There are certainly some places where this article gets stuck...
I think 18A will continue to be offered...
It's hard to imagine that 18A will be out of service soon after 14A comes out.

 

[poke01]

Well, which way, NVIDIA's SoC will also have a problem

NVIDIA N1x - Geekbench

Benchmark results for a NVIDIA N1x with an ARM ARMv8 processor.

browser.geekbench.com

This is N1X, so it’s basically on par with ARL mobile. This ARM SoC will also have good GPU IP. It’s launching at the same time as Panther lake, might actually be worth it to some people

 

[adroc_thurston]

This ARM SoC will also have good GPU IP.

And an unusable display engine.
You win some, you lose some.

 

[poke01]

an unusable display engine.

What’s the story there?

 

[adroc_thurston]

What’s the story there?

It's Nvidia.

 

[511]

You know that N1X chip from Nvidia might not actually be behind PTL then.

N1X is N3E for CPU

 

[Io Magnesso]

It's Nvidia.

Well, if you look at the recent condition of NVIDIA, that's the case.

 

[dullard]

It can only consume what it can consume at max voltage.
Which for N2 is 1.2v-ish. Not much.

So you know the current minimum and maximum for TSMS N2 with Intel's Nova Lake P-Core and E-Core design? Please share!

 

[adroc_thurston]

So you know the current minimum and maximum for TSMS N2 with Intel's Nova Lake P-Core and E-Core design?

uh, what.

 

[dullard]

uh, what.

Psst: power is current * voltage. Not just Vmax. Or you could provide resistance information if you have that instead. Just specifying Vmax gives us only half the picture.

To help you out, Vmax is a voltage, not a power.

I swear that you used to know things like that. Too hard for you now?

 

[adroc_thurston]

Just specifying Vmax gives us only half the picture.

No it gives you the whole picture since cores don't magically suck more Cac/Cdyn/whatever you call it because reasons.

 

[dullard]

No it gives you the whole picture since cores don't magically suck more Cac/Cdyn/whatever you call it because reasons.

So what is the whole picture? The whole range of power levels that could be used per E core and P core. Please share your wisdom.

By the way, capacitance is irrelevant to the discussion of frequency ranges since it drops out when comparing two power levels to two frequencies.

 

[adroc_thurston]

So what is the whole picture? The whole range of power levels that could be used per E core and P core.

There is no whole picture and there is no range.
DT parts always ride the tail end of the v/f curve aka they sit at Vmax for 1t.
10% 1T for NVL-S means 10% IPC with no clocks. that's it. pound sand.

 

[dullard]

There is no whole picture and there is no range.
DT parts always ride the tail end of the v/f curve aka they sit at Vmax for 1t.
10% 1T for NVL-S means 10% IPC with no clocks. that's it. pound sand.

So lets see what you have proven the last two days with this whole picture:

• you don't know power for the Nova Lake cores,
• you don't know frequency for the Nova Lake cores,
• you don't understand 1T at all,
• you think all desktop chips are always at Vmax,
• you don't understand frequency ranges that are possible at different powers,
• you claim "1t it's never power limited" then claim "it can only consume what it can consume" based on a power limit of Vmax (which isn't a power),
• you don't understand that different chips have different frequencies based on different power levels (they are not all at Vmax all the time)
• two posts in a row you claim "it gives you the whole picture" then "There is no whole picture"

Anything else that I missed?

 

[adroc_thurston]

So lets see what you have proven the last two days with this whole picture:

• you don't know power for the Nova Lake cores,
• you don't know frequency for the Nova Lake cores,
• you don't understand 1T at all,
• you don't understand frequency ranges that are possible at different powers,
• you claim "1t it's never power limited" then claim "it can only consume what it can consume" based on a power limit of Vmax (which isn't a power),
• you don't understand that different chips have different frequencies based on different power levels (they are not all at Vmax all the time)
• two posts in a row you claim "it gives you the whole picture" then "There is no whole picture"

Anything else that I missed?

Man, kid's right, this really is a mini-Gitmo filled with Stupid.

 

[dullard]

Man, kid's right, this really is a mini-Gitmo filled with Stupid.

Those are your quotes that are completely contradicting each other. I mean really, claiming no limit to power then claiming there is a power limit of Vmax. Claiming there is a whole picture, but there is no whole picture. If you'd like to give any proof to your claims about frequencies, power levels, whatever you think is the whole picture, go ahead. Otherwise, the world can see how you just posted for the last two days as evidence of what you know.

 

[Saylick]

There is no whole picture and there is no range.
DT parts always ride the tail end of the v/f curve aka they sit at Vmax for 1t.
10% 1T for NVL-S means 10% IPC with no clocks. that's it. pound sand.

But there's generally a higher frequency at that corresponding Vmax for each new node, as follows:


uLVT maxes out at 1.2V for both N3E and N2, but you get more frequency out of N2.

 

[adroc_thurston]

uLVT maxes out at 1.2V for both N3E and N2, but you get more frequency out of N2.

Indeed, only that the Vmax for N3 family is 1.3V-ish (aka what ARL-S sits at).

 

[dullard]

DT parts always ride the tail end of the v/f curve aka they sit at Vmax for 1t.

dullard said: Just specifying Vmax gives us only half the picture.

No it gives you the whole picture since cores don't magically suck more Cac/Cdyn/whatever you call it because reasons.

Just for giggles, lets pretend your two posts are true and think about the Arrow Lake 285K.

That means, since Intel Arrow Lake 285K has a given Vmax, that the P core and E core use the same power and run at the same frequency (because, in this post we are pretending that Vmax gives you the whole picture "because of reasons"). This is quite a revelation. Every article, every review, and every post claims that the P core and E core in the 285K run at different frequencies. You have suddenly disproven everyone else!

This whole time, I thought the P cores were more power hungry than the E cores. This whole time, I thought the 285K P cores ran from 3.7 GHz to 5.7 GHz depending on the use. But no, they are always at the tail end of the V/F curve and only run at VMax, so the frequency is always the same. This whole time, I thought the P core turbo frequency was 5.7 GHz and the E core turbo frequency was 4.6 GHz. But no, since they are desktop cores, in 1T, the P core and E core must run at the same frequency (because, in this post we are pretending that Vmax gives you the whole picture and nothing else matters).

This is truly world-changing. Or you are wrong. I wonder which it is.

 

[Saylick]

Indeed, only that the Vmax for N3 family is 1.3V-ish (aka what ARL-S sits at).

I imagine there's probably not a whole lot of Fmax to be gained going from 1.2V to 1.3V-ish on N3 given the steepness of the V-F curve, so I expect there to still be Fmax improvements for NVL being on N2, even if the Vmax reduces to 1.2V. Definitely not as good as AMD will have going from N4 to N2, that's for sure.

 

[DavidC1]

@dullard , your argument with Adroc started with him saying

-10% is the minimum I'd expect from a tock which leaves about whole 1% left for the frequency gain.

Because Intel said it's >1.1x, and marketing oversells so it's probably 11%. But then you said

-You could make that claim if it was iso-power. But do we even know that?

Which doesn't matter because >1.1x claim is in ST, which is max clocks. And Adroc is right with saying:

-It's 1t it's never power limited on desktop (anywhere, really).

Which is true because max TDP is 300W and a single core only uses about 30-40W at max frequency.

You also said

-Psst: power is current * voltage. Not just Vmax. Or you could provide resistance information if you have that instead. Just specifying Vmax gives us only half the picture.

To help you out, Vmax is a voltage, not a power.

I swear that you used to know things like that. Too hard for you now?

It don't matter. We are talking about >1.1x claim, which is ST performance, which is the domain of the ultra clocked P core, not E core.

Adroc also said

You can't, Vmax is one for all.

Because you said you can put infinite power to clock it really high for the single core,

Trying to do this with 1T is a fool's errand as Adroc said, you could throw essentially infinite power to it have massive frequencies and get no real useful estimates.

which is why Adroc responded as such, because you are limited by Vmax of the silicon.

 

[DavidC1]

I flat out don't believe we have reached a fundamental perf/clock wall. I think the x86 vendors can do 50-60% better per clock with 2026 technologies. They are still infested with Netburst/Bulldozer ideologies. The reason is because they are both selling CPUs, and clockspeed still sells, even in supposedly all-ascended Anandtech Forum people.

4.5GHz, 20% faster ST over Novalake and Zen 6, 10-15W ST power.

 

[adroc_thurston]

I flat out don't believe we have reached a fundamental perf/clock wall

No but getting more ILP is harder without becoming a 13mm^2 Real American Core in the process.

4.5GHz, 20% faster ST over Novalake and Zen 6, 10-15W ST power

You do understand that everyone in aa64 camp will be shipping 5GHz CPUs next year?