Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+4+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[LightningZ71]

Meh. It was actually rather informative about how that particular benchmark behaved on various architectures. Could have been summarized instead of direct pasted, but it was relevant to the discussion that was going on.

 

[Hulk]

Meh. It was actually rather informative about how that particular benchmark behaved on various architectures. Could have been summarized instead of direct pasted, but it was relevant to the discussion that was going on.

Yes, I should have put a little more thought into it.

 

[DavidC1]

So if Raichu is right about Xe3P about 20-25% over Xe3, then it's misleading to claim Xe3 is the small change, while Xe3P is the big one. Because ISO-wise, they are the same. Also, 20-25% would be a disappointment.

Let's think of the possibilities

1. 20-25% is indeed correct, meaning 18A is a zero contributor here
2. 20-25% is indeed correct, but 18A does net some gains, making the uarch even worse
3. The gains are actually higher

Also RDNA5 on Canis isn't 2x over Xe3, because it was specifically said as "15W being same perf as 30W". The only way it could have been true is if it's said "15W is 2x 15W" or "30W is 2x over 30W". The actual gains are going to be less than 2x. If PTL does 0.6x at 15W, then the advantage is 1.67x, or would be 1.35-1.4x over Xe3P. So in 2028, Intel would be faced with the same massive disadvantage in iGPU AMD faces today against Pantherlake.

Xe3P is big changes and double XMX throughput you can look at the GitHub for Xe3P
https://github.com/intel/compute-runtime/commit/d71f93c89b2d6ab1c3f8f404cd14744709c73cb7
FYI: SIMD 32 and major arch change even bigger than Xe -> Xe2

Yet the leakers are saying 20-25%. Computer chips are a black box, even to enthusiasts. The results are what we care about. So if Xe3 with the "small changes" are achieving 20-25% and Xe3P is doing the same, then to everyone else Xe3P changes = Xe3 changes, especially if we consider how far behind the competitor would be.

Why?

How about the alternative? Nvidia replaces the iGPU portion?

Cannon lake is a low bar tbh should be compared to Tiger Lake in terms of process

Icelake, not Cannonlake. Cannonlake was nonfunctional. Icelake was enough to get a product out but a wider uarch CPU that couldn't clock enough to beat the predecessor, while having a great iGPU gain = Pantherlake situation.

 

[511]

Icelake, not Cannonlake. Cannonlake was nonfunctional. Icelake was enough to get a product out but a wider uarch CPU that couldn't clock enough to beat the predecessor, while having a great iGPU gain = Pantherlake situation.

Well it's definitely not Ice lake otherwise it would have been failure ..... Also the comparison was between Intel nodes and not TSMC vs Intel nodes and what if we compare PTL vs LNL. There is no clock regression between them.

Yet the leakers are saying 20-25%. Computer chips are a black box, even to enthusiasts. The results are what we care about. So if Xe3 with the "small changes" are achieving 20-25% and Xe3P is doing the same, then to everyone else Xe3P changes = Xe3 changes, especially if we consider how far behind the competitor would be.

It's simple one reason memory Bandwidth what's the point if your memory bandwidth stays the same you have to carry with uarch changes.

 

[DavidC1]

Maybe we're focusing on wrong part of Pantherlake's significance.

The 4 Xe3 core version should be 20-30% within the 8 Xe2 Lunarlake. Wildcatlake's 2 Xe3 core should be ~4x the performance of the Twinlake predecessor, and be 20-30% within the 4 Xe2 core cut down version of Arrowlake's iGPU. Many games here would be playable on Low settings with Wildcat Lake.

https://www.notebookcheck.net/Intel-UHD-Graphics-24EUs-Alder-Lake-N-GPU-Benchmarks-and-Specs.760772.0.html

Well it's definitely not Ice lake otherwise it would have been failure ..... Also the comparison was between Intel nodes and not TSMC vs Intel nodes and what if we compare PTL vs LNL. There is no clock regression between them.

Icelake wasn't a failure. But the parallels are there. Also CPU-wise it's all against Arrowlake. We don't compare Core 2 to Pentium 4 and say it's amazing. We said it was amazing against Athlon X2.

It's simple one reason memory Bandwidth what's the point if your memory bandwidth stays the same you have to carry with uarch changes.

So you are saying Xe3P doesn't have enough changes to counter that, when the supposedly lesser change Xe3 can despite the trivial memory BW improvement. Thinking Xe3P is the bigger change seems to hinge nearly entirely on Intel saying Xe3P is the real change, when the performance seems to indicate that it's not the case. Also standard Intel iGPUs have never been severely BW bound like AMD's approach of "hur dur, let's put a fat GPU on low BW iGPU interface and see how it does?". Pantherlake 12 Xe gets a whole 4% in Timespy going from 8533 to 9600, which is 25% scaling which is below standard of 30%.

For BW, if you are above 30% then you are making an unbalanced architecture with too low BW, and if it's too low then your compute is too low compared to BW. This tells me while a 20-25% gain for Xe3P is nice, Intel's claims of Xe3P being special is a marketing misdirection at best and since Pantherlake is not only not memory bandwidth bound, but even under it, Xe3P is even less special. I would hope based on their claims Xe3P is 50% over Xe3 at same power.

 

[511]

Maybe we're focusing on wrong part of Pantherlake's significance.

The 4 Xe3 core version should be 20-30% within the 8 Xe2 Lunarlake. Wildcatlake's 2 Xe3 core should be ~4x the performance of the Twinlake predecessor, and be 20-30% within the 4 Xe2 core cut down version of Arrowlake's iGPU. Many games here would be playable on Low settings with Wildcat Lake.

Maybe someone has to do proper testing.

So you are saying Xe3P doesn't have enough changes to counter that, when the supposedly lesser change Xe3 can despite the trivial memory BW improvement. Thinking Xe3P is the bigger change seems to hinge nearly entirely on Intel saying Xe3P is the real change, when the performance seems to indicate that it's not the case. Also standard Intel iGPUs have never been severely BW bound like AMD's approach of "hur dur, let's put a fat GPU on low BW iGPU interface and see how it does?". Pantherlake 12 Xe gets a whole 4% in Timespy going from 8533 to 9600, which is 25% scaling which is below standard of 30%.

We don't know the correct TS scaling cause a reviewer has not yet performed proper testing we have only guesses at this point for the numbers.

For BW, if you are above 30% then you are making an unbalanced architecture with too low BW, and if it's too low then your compute is too low compared to BW. This tells me while a 20-25% gain for Xe3P is nice, Intel's claims of Xe3P being special is a marketing misdirection at best and since Pantherlake is not only not memory bandwidth bound, but even under it, Xe3P is even less special. I would hope based on their claims Xe3P is 50% over Xe3 at same power.

Well embargo is in 8 days we will know soon enough regarding PTL is mem bandwidth bound or not.