Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

Senior member
Apr 1, 2022
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Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






PPT1.jpg
PPT2.jpg
PPT3.jpg



As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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MoistOintment

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Jul 31, 2024
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You can't just keep buying 10bn, then 15bn, then 25bn new equipment every 18-24 months and then put up with the low yield rates while they ramp up only to be hit with the cycle again
Intel's biggest challenge is there lack of legacy node customers. People are hyper focused on 18A, but I think more attention needs to be paid to nodes like Intel 16.

Of course the cycle is unsustainable using Intel's previous strategy of dropping a node after developing the next one. But securing legacy node volume from 3rd parties the most critical part of the fabs' success.

Another short term issue is a lack of an equivalent node like N6: A cheaper, high volume node to be used for less critical components, like SoC tiles.

You can deal with low yields as new nodes ramp if you have a backlog of legacy nodes being purchased by 3rd parties while your internal designs derisk these lower yield nodes on a small chiplet that goes into a laptop SoC.
 

511

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Jul 12, 2024
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Intel's biggest challenge is there lack of legacy node customers. People are hyper focused on 18A, but I think more attention needs to be paid to nodes like Intel 16.

Of course the cycle is unsustainable using Intel's previous strategy of dropping a node after developing the next one. But securing legacy node volume from 3rd parties the most critical part of the fabs' success.

Another short term issue is a lack of an equivalent node like N6: A cheaper, high volume node to be used for less critical components, like SoC tiles.

You can deal with low yields as new nodes ramp if you have a backlog of legacy nodes being purchased by 3rd parties while your internal designs derisk these lower yield nodes on a small chiplet that goes into a laptop SoC.
I always wonder why don't convert your 14nm to industry tooling it is the best 14nm class process in the industry even better than TSMC 12nm
 

Hulk

Diamond Member
Oct 9, 1999
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Intel's biggest challenge is there lack of legacy node customers. People are hyper focused on 18A, but I think more attention needs to be paid to nodes like Intel 16.

Of course the cycle is unsustainable using Intel's previous strategy of dropping a node after developing the next one. But securing legacy node volume from 3rd parties the most critical part of the fabs' success.

Another short term issue is a lack of an equivalent node like N6: A cheaper, high volume node to be used for less critical components, like SoC tiles.

You can deal with low yields as new nodes ramp if you have a backlog of legacy nodes being purchased by 3rd parties while your internal designs derisk these lower yield nodes on a small chiplet that goes into a laptop SoC.
How about finding soft spots in the market for older nodes like auto SoC's and getting really competitive on pricing?
 

maddie

Diamond Member
Jul 18, 2010
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Maybe but the board needs firing as well especially the yeary guy he has been at the board since the bean counter period begin
I'll take another position for argument's sake: Tech is not the fundamental problem with Intel but people and culture.

How do the board members get information? The assumption is that they know everything relevant/crucial to Intel.

What if the info submitted for board review and approval is "massaged" a bit or a lot. Most companies reflect the wider society and........... anyone else the notice general level of truth. Lies abound and are increasingly accepted as normal behavior.

This behavior seems to have been prevalent at Intel. Fab lying to design, vice versa, and all knowing the game. This from 1st hand testimony. Are we surprised at the crashing once giant.
 

511

Diamond Member
Jul 12, 2024
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I'll take another position for argument's sake: Tech is not the fundamental problem with Intel but people and culture.
Exactly and the few people from which the culture started are still there
How do the board members get information? The assumption is that they know everything relevant/crucial to Intel.
They don't have relevant experience in running Intel we have the entire decade to see 14nm+++++/10nm+++
What if the info submitted for board review and approval is "massaged" a bit or a lot. Most companies reflect the wider society and........... anyone else the notice general level of truth. Lies abound and are increasingly accepted as normal behavior.

This behavior seems to have been prevalent at Intel. Fab lying to design, vice versa, and all knowing the game. This from 1st hand testimony. Are we surprised at the crashing once giant.
The board surely should have known this no?
 

maddie

Diamond Member
Jul 18, 2010
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Exactly and the few people from which the culture started are still there
That why I said a complete break is needed.
They don't have relevant experience in running Intel we have the entire decade to see 14nm+++++/10nm+++
At the board level, pure technical expertise is not that important, IF, you're getting good info from below. Remember companies (publicly traded ones) exist to make a profit for shareholders. The product is almost irrelevant to those entities.

Having said that, I think they will need tech savvy board members going forward to pierce the BS.
The board surely should have known this no?
It's quite possible they didn't. Just recently they couldn't supply demand.

Have you ever in a social setting spoken directly to this class of individuals? I have, in my country, went to school with a few, and some are really dumb.

Us as enthusiasts, think and talk about minutia constantly, they don't and implicitly believe whatever is presented.
 

oak8292

Member
Sep 14, 2016
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Yep, you know it and I know it, but the market wants magical customers like Nvidia, Broadcom that will allow Intel to capture some of that sweet AI money, so who is going to pay top dollar for the first smaller dies like Apple does for TSMC? So that's basically no serious big fab customers till when, 2027? Pat would not have lasted that long.

Frankly if 18A was really doing well then Intel would have been shouting about it from the rooftops.
The biggest customer for this type of pipe cleaning is Qualcomm. Qualcomm has a run rate of 800 million die per year and uses multiple foundries. They were the largest customer on TSMC prior to Apple swapping foundries with them. Both Qualcomm and Nvidia have used Samsung since Apples move to TSMC.

Qualcomm is opportunistic in using foundries and being in competition with Mediatek needs low cost foundry services. Intel might have to give a discount to get pipe cleaner status from Qualcomm.
 

511

Diamond Member
Jul 12, 2024
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The biggest customer for this type of pipe cleaning is Qualcomm. Qualcomm has a run rate of 800 million die per year and uses multiple foundries. They were the largest customer on TSMC prior to Apple swapping foundries with them. Both Qualcomm and Nvidia have used Samsung since Apples move to TSMC.

Qualcomm is opportunistic in using foundries and being in competition with Mediatek needs low cost foundry services. Intel might have to give a discount to get pipe cleaner status from Qualcomm.
Pipe cleaner is Intel tbh QC can be for mobile
 

oak8292

Member
Sep 14, 2016
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Pipe cleaner is Intel tbh QC can be for mobile
When you say ‘mobile’ is this Intel U parts or actually 100 million smartphone parts. Back on 14 nm they ramped on U parts and defined high volume manufacturing as 1 million die in a quarter, which is less than a FOUP per day. Mobile as defined by smartphones provides a lot more data and has successfully been used by TSMC to ramp.
 

OneEng2

Senior member
Sep 19, 2022
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Intel's biggest challenge is there lack of legacy node customers. People are hyper focused on 18A, but I think more attention needs to be paid to nodes like Intel 16.

Of course the cycle is unsustainable using Intel's previous strategy of dropping a node after developing the next one. But securing legacy node volume from 3rd parties the most critical part of the fabs' success.

Another short term issue is a lack of an equivalent node like N6: A cheaper, high volume node to be used for less critical components, like SoC tiles.

You can deal with low yields as new nodes ramp if you have a backlog of legacy nodes being purchased by 3rd parties while your internal designs derisk these lower yield nodes on a small chiplet that goes into a laptop SoC.
Exactly this.

My contention is still that the transition of Intel to a fab-as-a-service company is only just beginning in 2025.

Lots of bad quarters before they emerge from the dark.
 
Jul 27, 2020
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Have you ever in a social setting spoken directly to this class of individuals? I have, in my country, went to school with a few, and some are really dumb.
I was once in a top level meeting where one of our board members was present. Everyone was patting themselves on a new solution where they would buy/sell shares using our financial software that was connected directly to the central bank. When everyone was done talking, I simply asked, do we have central bank's approval to do this? Everyone went quiet and that particular "dumb" board member seemed annoyed and said, of course we would get approval. They never got approval and things never moved forward. Later, he was put in charge of a business manufacturing e-cigarettes. It also went nowhere and had to be shut down. With nothing else to do, now he's been put in charge of propping up our company and it's just going to hell in more ways than one. And oh, I was never invited to another meeting with that board member again :D
 

LightningZ71

Platinum Member
Mar 10, 2017
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Some of us have applicable past experience with large corporations that are run in a similar manner to Intel. It's not like their board members are from other industries and many of their executives are from non-silicon companies previously or anything like that...
 

511

Diamond Member
Jul 12, 2024
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When you say ‘mobile’ is this Intel U parts or actually 100 million smartphone parts. Back on 14 nm they ramped on U parts and defined high volume manufacturing as 1 million die in a quarter, which is less than a FOUP per day. Mobile as defined by smartphones provides a lot more data and has successfully been used by TSMC to ramp.
I mean smartphone SOC for the complete node package of HP/SOC Libraries