Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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Intel Core Ultra 100 - Meteor Lake

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As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



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dullard

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Which OEMs had available models at MTL launch?
1) OEMs don't generally have laptops available at launch. It takes time for them to receive the chips and design thermal systems around them and their particular hot spot locations. Cooling on a thin device takes custom work.

2) OEMS do generally have desktops available at launch. The desktop chips tend to be plug and play, working at least somewhat decently with cooling systems already available.

Guess which category Nova Lake is.
 

Hitman928

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Apr 15, 2012
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1) OEMs don't generally have laptops available at launch. It takes time for them to receive the chips and design thermal systems around them and their particular hot spot locations. Cooling on a thin device takes custom work.

2) OEMS do generally have desktops available at launch. The desktop chips tend to be plug and play, working at least somewhat decently with cooling systems already available.

Guess which category Nova Lake is.

So you’re saying that if it is an OEM roadmap, that the timing of the already launched products shown on the road map would make sense. . .
 

511

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Jul 12, 2024
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1) OEMs don't generally have laptops available at launch. It takes time for them to receive the chips and design thermal systems around them and their particular hot spot locations. Cooling on a thin device takes custom work.
they have 1-2 models to buy at launch the real volumes come after the product is fully ramped up
Guess which category Nova Lake is.
NVL covers everything Desktop/Mobile
 

naukkis

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Jun 5, 2002
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Clearwater Forest clocks slightly higher

59TFlops for 576 cores.

With 64-bit compute, each core can compute 8x Flops per GHz. Let's assume 3GHz.
4x128-bit units x 128/64-bit x 3GHz x 576 cores = 13.8TF

So for the math to make sense, they are using FP16 for "AI". At 3GHz that equals to 55.3TFlops. To reach 59TFlops, it needs to be 3.2GHz, which is 200MHz higher than the peak frequency of Xeon 6780E Sierra Forest. There's potential to reach 3300 in 2P SpecIntRate, which is 2.3x SRF.

Skymont can do 4 128 bit FMAs per cycle. So you need to double your calculated flops - so maybe it achieve those 59Tflops with fp32 instead of fp16.
 
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dullard

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May 21, 2001
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So you’re saying that if it is an OEM roadmap, that the timing of the already launched products shown on the road map would make sense. . .
Having every just about every launch be in Q2 of every year regardless of CPU launch date should give you some clues about the roadmap. Also that should give you clues that it has nothing to do with CPU launch dates.
 
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Hitman928

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Apr 15, 2012
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Having every just about every launch be in Q2 of every year regardless of CPU launch date should give you some clues about the roadmap. Also that should give you clues that it has nothing to do with CPU launch dates.

So again, if it’s an OEM roadmap, it would make sense as they do annual refreshes, typically releasing in Q2 timeframe. . .
 

ashFTW

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Sep 21, 2020
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They are only replacing the Compute tiles from Darkmont to Arctic Wolf also the IO tile will be on Intel 4/3 for DMR/RRF.

Clearwater -> IO Die I7(Reused with GNR/SRF) ,Base Die 3T,Compute 18A.
DMR -> IO Die I3/4, Base 3T, Compute(Reuse from Clearwater ?) -18AP
RRF -> IO Die I3/4, Base 3T(Reuse From Clearwater?), Compute - 18AP
No way DMR uses Clearwate Compute tile. All Rapids are P-core, and Forests are E-core