Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[OneEng2]

Lmao no

I don't think so either. I think Intel will clock ~200-400Mhz slower than AMD in the next generation.

Latency != ST performance improvement

Not what I have seen.

I am having the same vibe as Zen5 vs ARL. Zen 6 is getting Hyped but NVL is meh in the end it will be similarish just like Zen5 vs ARL played out similar ST/MT.

Oh, I think there has been plenty of hype on both ends, but I agree, Zen 6 hype is over the top IMO.

The top NVL-S SKU is supposed to outnumber Zen 6 in core count by 2:1. I don't see why Cinebench would be a loss or even a narrow win for NVL.

I suspect NVL will easily win CB24 benchmark.

Internal estimation is NVL loses everything(gaming, ST, etc) except MT against Zen6.

Yes, but ..... once you start going to use cases where you actually NEED this many cores, wouldn't you be buying a Threadripper that will handily best NVL and desktop standard Zen 6?

I look at it this way:
Zen 6 24 core with HT (add 1/3 for HT, probably a generous estimate) = 32 core equivalent
NL, if it actually materializes, 16 P cores, 32 E cores (estimate 60% of P core, could be better) give approx 20 equivalent P cores = 36 core equivalents

So yea, given that even on the same node, AMD should be more power efficient, I would estimate approximately equal MT performance. Personally, I dont care about the MT. I am more interested in the V-cache single CCD chips. If AMD can offer a 12 core V-cache on a single CCD for a price close the the 9800 X3D that would be a killer. I dont see how Intel can match it, even if they bring on the "V-cache equivalent", (forget what they call it) they would still be limited to 8 cores on a single tile.

In lots of desktop stuff, SMT doesn't scale nearly as well as it does in DC, but still, your 1.3 might be correct.

Despite this, I don't expect NVL 52c to lose any desktop MT tests.

Well... what matters is what the salvagability is of Panther Lake. In particular the 5 model. If yields were bad, they could just cut the core count of the 5 model and maybe also do a 3 model (or even "Intel Processor")

Although Arrow and Lunar didn't cut the core count. Course that's likely because they were fabbed at TSMC.

I think this is a sad day for all consumers. Everyone should be rooting for Intel to pull its way out of this mess.

I mentioned some time back that I thought that it was BS to calculate yields without a frequency target included. At the end of the day, if 18A can only create Panther Lake at 1Ghz @ 90% yield, it is a total failure.

I think that 18A might end up being great for high core count, lower clock speed DC parts though. We will see.

18A parametric yield is horrible. This is no secret, many sources have been saying the defect rate is fine, but the clocks are very not fine.

Perhaps it's time for the US government to step in and help out Intel. The US can't afford to be held by the short and curliest by the fate of TSMC and the whims of Xi in China.

If you thought we had a chip shortage during COVID, imagine how bad things could get if TSMC gets shut down by a smart bomb from China. It's horrifying to even consider.

 

[511]

If you thought we had a chip shortage during COVID, imagine how bad things could get if TSMC gets shut down by a smart bomb from China. It's horrifying to even consider.

Bomb is too much even blocking the supply of material will do the trick.

 

[OneEng2]

Bomb is too much even blocking the supply of material will do the trick.

Just the threat of blocking the supply would likely tank the stock market!

 

[511]

Just the threat of blocking the supply would likely tank the stock market!

Intel will jump 100% xDd so grandma can be happy.

 

[Thunder 57]

Perhaps it's time for the US government to step in and help out Intel. The US can't afford to be held by the short and curliest by the fate of TSMC and the whims of Xi in China.

If you thought we had a chip shortage during COVID, imagine how bad things could get if TSMC gets shut down by a smart bomb from China. It's horrifying to even consider.

I don't like "to big to fail" but if Intel spunoff their fabs that might be a good investment.

 

[511]

I don't like "to big to fail" but if Intel spunoff their fabs that might be a good investment.

Which Intel won't cause the shareholders won't allow the milking cow to be separate so it's going to be a difficult thing it's possible but Intel products would demand good Money from US Government for this lol.

 

[DrMrLordX]

They did it with Ice Lake

Sort of? If we're talking parametric yields being bad then maybe you have a point. Ice Lake-U was a competent part (compared to Cannonlake) and shipped in enough quantity for Intel's customer base of the day. The clocks were a bit disappointing. But they weren't as bad as Cannonlake (see below).

Not just Icelake, but Cannonlake. That the defect rate was acceptable but parametric yield was bad. If you take a look at the released parts, it had to be downclocked, meaning it couldn't clock as high.

Then there was strange rumors like iGPU needing to be disabled. Since GPUs are more repetitive structures it doesn't point to defect rates.

AT got ahold of a Chinese student laptop that had a salvaged Cannonlake part. If I recall, it was a dual core with the iGPU disabled. And it was quite bad.

edit: here's the part in question - the i3-8121U: https://www.notebookcheck.net/Intel-Core-i3-8121U-SoC-Benchmarks-and-Specs.303400.0.html

Taking all that into account, if Panther Lake parts are suffering parametric yields like Cannonlake then yeah they can't even push such a product out the door. If it's Ice Lake-U all over again then it'll be a mildly disappointing part (and more wasted time/effort for Intel) but hey at least they can still sell it. Then they can refresh the lineup with 18ap later and hopefully salvage Panther Lake or . . . whatever.

Also if Panther Lake is having such poor yields then imagine what's happening with Clearwater Forest and Diamond Rapids.

 

[Kepler_L2]

Sort of? If we're talking parametric yields being bad then maybe you have a point. Ice Lake-U was a competent part (compared to Cannonlake) and shipped in enough quantity for Intel's customer base of the day. The clocks were a bit disappointing. But they weren't as bad as Cannonlake (see below).

Remember the CES show just a few months after Ice Lake launch had like 30 Intel laptops on display and almost all of them were Comet Lake. ICL-U was very much a paper launch just to say 10nm wasn't dead.

 

[DrMrLordX]

Remember the CES show just a few months after Ice Lake launch had like 30 Intel laptops on display and almost all of them were Comet Lake. ICL-U was very much a paper launch just to say 10nm wasn't dead.

You may be right. But I do remember quite a few actual Ice Lake-U products hitting the market in a somewhat-timely fashion. Unlike Ice Lake-SP which was horribly late and still didn't ship many units even after it's actual market debut.

 

[csbin]

what?

https://twitter.com/x/status/1952989828066492620

 

[511]

Kepler keeps doing this sometime the leak go from AT Forum -> Twitter sometimes Twitter -> AT forums 😂

 

[511]

Well if PTL is between 4.5 GHz - 5Ghz it's salvageable if it's below 4Ghz it's embarrassing and can't be salvaged. 😂

 

[LightningZ71]

At one point, Intel was practically giving away i3-1005g1 chips. You could barely find any reasonably priced i7 products, but I3 parts were sold for barely more than the cost of the rest of the notebook components...

 

[511]

At one point, Intel was practically giving away i3-1005g1 chips. You could barely find any reasonably priced i7 products, but I3 parts were sold for barely more than the cost of the rest of the notebook components...

If 18A s*** the parametric yield than It would mean cheap U3/U5 and uber expensive U7/U9.

 

[Magio]

Well if PTL is between 4.5 GHz - 5Ghz it's salvageable if it's below 4Ghz it's embarrassing and can't be salvaged. 😂

I don't know, with very little IPC gains expected, anything below ARL and LNL would make it a hard sell by any metric. Particularly bad considering N3B wasn't even that good a node in terms of transistor performance.

What would be an easier sell is U7/U9 >5GHz and U5/U3 <5GHz, but it needs top parts that at least don't get ridiculed by ARL/LNL/Zen5 in ST.

 

[511]

I don't know, with very little IPC gains expected, anything below ARL and LNL would make it a hard sell by any metric. Particularly bad considering N3B wasn't even that good a node in terms of transistor performance.

What would be an easier sell is U7/U9 >5GHz and U5/U3 <5GHz, but it needs top parts that at least don't get ridiculed by ARL/LNL/Zen5 in ST.

Well even if we take returs at face value it seems(Which is like saying MLID claims at face value) 15% parts are at least hitting the target aka U7/U9 but I agree with you IPC Gains are 5℅ at max or less.

 

[Magio]

Well even if we take returs at face value it seems(Which is like saying MLID claims at face value) 15% parts are at least hitting the target aka U7/U9 but I agree with you IPC Gains are 5℅ at max or less.

Well Reuters is still better than MLID, at least their sources are never Twitter DMs !

Some PTL parts in the 4.5 to 5GHz range would be salvageable (mostly), yeah. But I took your previous comment as meaning that you meant sub-5GHz on the top end parts would be which is what I disagreed with.

 

[Tigerick]

Well if PTL is between 4.5 GHz - 5Ghz it's salvageable if it's below 4Ghz it's embarrassing and can't be salvaged. 😂

So now you think PTL's CPU below 5GHz is OK for 18A process while other CPUs are all running above 5GHz with older process. As I said, 18A is comparable to N4P; AMD's Gorgon Point with 5.2GHz+ and 24 threads is powerful enough to beat PTL. Not to mention GPU and NPU. What a failure node for IFS...No wonder there is zero customer committed...

Bionic just confirmed with my source that 12XE iGPU will be fabbed by N3E process, only 4XE tile will be fabbed by Intel 3.

Here I am speculating further; PTL's CPU will experience many hiccups similar to MTL's CPU (Intel 4). The only selling point is iGPU from TSMC: 50% more cores sure improve performance. Will it surpass Gorgon Point's 16CU, hoho we shall see.

Remember Pat was saying PTL is having 70% inhouse silicon area. That's another BS talk from him; he is including base tile. Excluding base tile, PTL is only having 20% inhouse with 30% belong to TSMC.

 

[511]

Bionic just confirmed with my source that 12XE iGPU will be fabbed by N3E process, only 4XE tile will be fabbed by Intel 3.

It was pretty much known I said it somewhere 18A is not optimised for GPU so they are not making one on it

So now you think PTL's CPU below 5GHz is OK for 18A process while other CPUs are all running above 5GHz with older process. As I said, 18A is comparable to N4P; AMD's Gorgon Point with 5.2GHz+ and 24 threads is powerful enough to beat PTL. Not to mention GPU and NPU. What a failure node for IFS...No wonder there is zero customer committed...

I said OK not good it's gonna cost them a good chunk if it's true(its returs anyway) as for Claiming N4P same as 18A is ridiculous Intel 3 is more than enough match for N4P in PPA.

Remember Pat was saying PTL is having 70% inhouse silicon area. That's another BS talk from him; he is including base tile. Excluding base tile, PTL is only having 20% inhouse with 30% belong to TSMC.

He is correct depending on SKU this one SKU is the only exception though. The one with Intel I GPU tile has > 70% In house active silicon if you count filler tile than he is correct on all SKU.
Die 4 is Intel 18A
Die 1 is N6
Die 5 is N3E rest are filler go ahead and do the calculation.
If we only count active tile it's 50% this is the halo SKU also the iGPU on PTL is gonna beat Gorgon Point Easily.

 

[Joe NYC]

Intel cores are chungus.

It seems to me that in 6 P-core or 8 P-core implementations, are not a huge problem on client.

But I wonder how Intel is going to compete with 256 P-cores, the cores that will be even bigger with addition of AVX-512 in the server market, in Diamond Rapids.

BTW, competing against AMD Dense cores, which could be 1/2 of the size, while including both AVX-512 and SMT. Possibly even clocking higher.

I have hard time seeing how this is a feasible plan for Intel.

 

[511]

It seems to me that in 6 P-core or 8 P-core implementations, it is not a huge problem on client.

But I wonder how Intel is going to compete with 256 P-cores, that will be even bigger with addition of AVX-512 in the server market, in Diamond Rapids.

BTW, competing against AMD Dense cores, which could be 1/2 of the size, while including both AVX-512 and SMT. Possibly even clocking higher.

I have hard time seeing how this is a feasible plan for Intel.

Don't forget AMX taking lot of the die size

 

[adroc_thurston]

But I wonder how Intel is going to compete with 256 P-cores, that will be even bigger with addition of AVX-512 in the server market, in Diamond Rapids.

BTW, competing against AMD Dense cores, which could be 1/2 of the size, while including both AVX-512 and SMT. Possibly even clocking higher.

I have hard time seeing how this is a feasible plan for Intel.

You're onto something.
There's a good reason Xeon roadmap is basically dead until Unified Core.

 

[mpumalanga]

It was pretty much known I said it somewhere 18A is not optimised for GPU so they are not making one on it

I said OK not good it's gonna cost them a good chunk if it's true(its returs anyway) as for Claiming N4P same as 18A is ridiculous Intel 3 is more than enough match for N4P in PPA.

He is correct depending on SKU this one SKU is the only exception though. The one with Intel I GPU tile has > 70% In house active silicon if you count filler tile than he is correct on all SKU.
Die 4 is Intel 18A
Die 1 is N6
Die 5 is N3E rest are filler go ahead and do the calculation.
If we only count active tile it's 50% this is the halo SKU also the iGPU on PTL is gonna beat Gorgon Point Easily.
View attachment 128375

Why would you count filler tiles for these 70% ?
That is really being very economical with the truth for a CEO.
But I guess par for the course for intel.

 

[Khato]

Why would you count filler tiles for these 70% ?
That is really being very economical with the truth for a CEO.
But I guess par for the course for intel.

It's not. Ignoring the base silicon, PTL-U and PTL-H are both ~72% Intel 18A silicon. It's only PTL-P with the large graphics tile that drops down to ~52% Intel 18A.

 

[poke01]

I’ll add a profile pic to this account if 18A surpasses 5.7GHz