Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[AcrosTinus]

What real world, big boy work are you doing that doesn't need to communicate outside of its L2 ghettocluster quickly?
The current monts in desktop parts are configured for one thing and one thing only - chart wankery.

The E-Cores help with:

• File compression
• File transfer, my array is 8xGen5 speed as well as my other Optane one being 8xGen4 (2xP5800x 800GB) on DMI (on the task manager I hit nearly 70% just moving files at high speed)
• Compiling
• Virtual Machines for isolated test environments
• Containers for test servers
• Running stuff without much impact on other processes

If you cannot imagine what MT performance can give you or never felt it, you might never need a faster CPU and that is fine.

 

[Fjodor2001]

The 48c NVL will be much more power-/clockspeed-constrained

Clockspeed will be a bit lower for E cores, yes. But why do you think it will be more power constrained? Remember that E cores consume much less power than both P and Zen6 cores do.

Zen6 increases core count by 50%, increases IPC by ~6-12%, and will probably be able to reach similar or higher all-core clocks compared to Zen5, so expecting roughly 1.6x MT perf for 10950X vs. 9950X is reasonable.

Are you expecting the 24 Zen6 cores to clock higher than 16 Zen5 cores, when all cores are at max clocks? How much additional power consumption are you expecting will be needed for that, e.g. 1.5x more than for 9950X since it'll have 1.5x cores?

 

[AcrosTinus]

It also sucks in SPECint 2017. And Phoronix. And Geekbench. And Speedometer, which I was assured it would dominate. Not just gaming.
Mind you this message is sent from a LNL laptop via a VPN + firewall running on a ARL W880 server. So it's not like I am against Intel selling things cheaply. But don't bury your head in the sand. ARL managed to fail to meet even its modest hypetrain.

That is just false, and proves that you don't own a ARL System. After even the boost update all these named benches improved significantly.

 

[MS_AT]

I wonder how you reached that conclusion. NVL-S will have 16 P cores + 32 E cores, and Zen6 24 cores. So assuming 16 P cores approximately will match 16 Zen6 cores, do you mean that the remaining 8 Zen6 cores will be faster than 32 E cores?

Obviously my math was wrong;P From throughput/c alone, 32E cores should be equal to 16 Zen6 cores. I must have assumed 8 P cores for some reason. Know this message as well as previous message is only about throughput per cycle. It says nothing about real performance. Just to make it clear, before somebody starts to claim I have said something I did not say

The 48c NVL will be much more power-/clockspeed-constrained, and you're forgetting that SMT matters in MT workloads, so 16 Zen6 cores will often beat 16 P cores in MT.

Since we were discussing AVX512/AVX10, SMT doesn't play as big of a role.

 

[511]

Let's not forget we got a node shrink and improved Uncore for NVL which was the main issue with Arrow Lake also each tile would have have lower latency L3 just cause we have 4 Stops less 12-> 8.

 

[gdansk]

That is just false, and proves that you don't own a ARL System. After even the boost update all these named benches improved significantly.

Behold 1 of 2 x 265K in my house

ASRock B860I WiFi - Geekbench

Benchmark results for an ASRock B860I WiFi with an Intel Core Ultra 7 265K processor.

browser.geekbench.com

And indeed it scores worse in 1T GB6, Speedometer than my 9700X at 88W

ASRock B650M Pro RS - Geekbench

Benchmark results for an ASRock B650M Pro RS with an AMD Ryzen 7 9700X processor.

browser.geekbench.com

On paper they're the same clock rate. It should not be losing. And yet...

 

[AcrosTinus]

Behold 1 of 2 x 265K in my house

ASRock B860I WiFi - Geekbench

Benchmark results for an ASRock B860I WiFi with an Intel Core Ultra 7 265K processor.

browser.geekbench.com

And indeed it scores worse in 1T GB6, Speedometer than my 9700X at 88W

ASRock B650M Pro RS - Geekbench

Benchmark results for an ASRock B650M Pro RS with an AMD Ryzen 7 9700X processor.

browser.geekbench.com

On paper they're the same clock rate. It should not be losing. And yet...

Mine does 3300 and 23400, so I might make a post later. Also GB does not scale well, I would use different benches, GB gives you the illusion that a 8 core CPU is close. Rendering, compiling and transcoding will leave that 8 core chip crying for its missing CCD.

 

[gdansk]

Mine does 3300 and 23400, so I might make a post later. Also GB does not scale well, I would use different benches, GB gives you the illusion that a 8 core CPU is close. Rendering, compiling and transcoding will leave that 8 core chip crying for its missing CCD.

That agrees with what I said. At the same clock rate ARL is behind in 1T performance of Zen 5 in GB6, Speedometer, SPECint, etc. It isn't just a gaming anomaly, though that's the worst of it.

 

[reaperrr3]

Clockspeed will be a bit lower for E cores, yes. But why do you think it will be more power constrained? Remember that E cores consume much less power than both P and Zen6 cores do.

They only consume much less power at much lower clocks, aka much closer to their sweet-spot.
But they aren't inherently much more efficient clock for clock (compared to P-cores maybe, but not compared to Zen).

Are you expecting the 24 Zen6 cores to clock higher than 16 Zen5 cores, when all cores are at max clocks?

At least slightly, yes.

How much additional power consumption are you expecting will be needed for that, e.g. 1.5x more than for 9950X since it'll have 1.5x cores?

Not much, if any.

The new IOD and IF tech will probably save a flat ~10-15W or so vs. Zen4/5, freeing up more TDP for the cores.
N2P vs. N4P will likely allow to hit similar clocks at notably lower voltage, in addition to lower power even at same voltage.
~30% lower power consumption per core at 9950X clocks isn't unfeasible.

200W x0.7 (process) x1.5 (cores) = 210W, minus 10-15W from IOD savings = same 200W.

If the power savings are a bit higher or if they go a little more aggressive on the PPT (230W like 7950X), 100-200 MHz higher all-core sounds very much possible.
Combined with the rumored ~6% higher FP IPC and 10+% higher INT IPC, that's easily 1.6x MT perf of the 9950X.

And that's assuming uniform all-core clocks. It's possible that they'll go for more flexible clock distribution, like 1 CCD clocking at 9950X clocks and 1 CCD clocking ~200-300 MHz higher, for example.

Since we were discussing AVX512/AVX10, SMT doesn't play as big of a role.

Fair enough.

 

[reaperrr3]

Let's not forget we got a node shrink and improved Uncore for NVL which was the main issue with Arrow Lake also each tile would have have lower latency L3 just cause we have 4 Stops less 12-> 8.

Intel's node shrink isn't bigger than AMD's (actually smaller when it comes to desktop), and Zen6 has some uncore improvements as well (larger mono L3 per CCD, new IOD).

Considering how much of a failure ARL is and how many people Intel is culling, I'm not convinced that NVL will magically fix everything.
People were expecting Intel to fix their server chip oopsies quickly too, and look where we are today.

I mean, look no further than LBT's statements. If the CEO himself is suggesting they won't be competitive for a while, that doesn't exactly indicate that NVL will be their next Alder Lake, but rather be more of the (recent) same.

 

[511]

Considering how much of a failure ARL is and how many people Intel is culling, I'm not convinced that NVL will magically fix everything.
People were expecting Intel to fix their server chip oopsies quickly too, and look where we are today.

the did fix their server chips though GNR has fixed almost everything except the P core perf DMR also improves upon it but no HT is a big feature cut

I mean, look no further than LBT's statements. If the CEO himself is suggesting they won't be competitive for a while, that doesn't exactly indicate that NVL will be their next Alder Lake, but rather be more of the (recent) same.

LBT Motto under promise over deliver

 

[511]

轻松超越258V，锐龙Z2 Extreme测试报告_哔哩哔哩_bilibili

回来吧AMD，我最骄傲的信仰, 视频播放量 3641、弹幕量 5、点赞数 186、投硬币枚数 19、收藏人数 39、转发人数 21, 视频作者 金猪升级包, 作者简介 既不独立，也不客观，更不公正，相关视频：新驱动RX9070XT和RTX5070TI游戏&生产力对比测试｜显卡日报8月4日，Intel发布XeSS 2.1 SDK：N卡、A卡也能用，又一块家用友好型企业级硬盘出现了——东芝MG10-D 8TB评测，1.1KG里塞了个4050，双2280可换内存的抽象工程机，Linux创始人，仍然在使用Radeon...

t.co

 

[DrMrLordX]

The 1% lows on the 258V seem kinda bad. Except in FI 24 and Bannerlord.

 

[511]

This is TDP which includes RAM in LNL

 

[511]

E cores

P cores

in CP 2077 how can Lion Cove can be this lame

https://m.weibo.cn/detail/5195682660483238

 

[gdansk]

A screen cap where the CPU is at 800MHz may not be representative.
Every time I tried to limit games to e cores, the results got worse. On both the 226V and 265K. I really, really have to wonder what people are doing to get the contrary. It is seemingly impossible...

 

[511]

A screen cap where the CPU is at 800MHz may not be representative.
Every time I tried to limit games to e cores, the results got worse. On both the 226V and 265K. I really, really have to wonder what people are doing to get the contrary. It is seemingly impossible...

do you have an MSI device?

 

[gdansk]

do you have an MSI device?

No, only an Asus laptop and a DIY desktop with LNC/Skymont to test. Plus I don't own that game. So I can't test this specific scenario. Maybe I can try to set the TDP lower, perhaps that's cause here.

 

[511]

No, only an Asus laptop and a DIY desktop with LNC/Skymont to test. Plus I don't own that game. So I can't test this specific scenario. Maybe I can try to set the TDP lower, perhaps that's cause here.

Pirate it for science also windos affinity doesn't work?

 

[igor_kavinski]

I think the Lion Coves throttle easily, not necessarily because of heat but possibly due to some built-in protection mechanisms to avoid boosting them for prolonged periods. I think Intel got too cautious after the Raptor Lake debacle.

 

[511]

In LNL I think LNC doesn't have the power budget to be better than Skymont

 

[adroc_thurston]

In LNL I think LNC doesn't have the power budget to be better than Skymont

288V is like 28W, enough for LNC to do stuff.

 

[511]

288V is like 28W, enough for LNC to do stuff.

Here the TDP is 17-18W though

 

[ondma]

The 48c NVL will be much more power-/clockspeed-constrained, and you're forgetting that SMT matters in MT workloads, so 16 Zen6 cores will often beat 16 P cores in MT.

The current NVL-Sx2 rumors say 1.1x for ST and 1.6x for MT vs. ARL (285K).
285K and 9950X in MT workloads are roughly a tie on average, according to computerbase.de (in non-gaming applications, mind you).

Zen6 increases core count by 50%, increases IPC by ~6-12%, and will probably be able to reach similar or higher all-core clocks compared to Zen5, so expecting roughly 1.6x MT perf for 10950X vs. 9950X is reasonable.
So unless NVLx2 punches well above its rumored MT weight, 10950X should roughly match it in MT.

I look at it this way:
Zen 6 24 core with HT (add 1/3 for HT, probably a generous estimate) = 32 core equivalent
NL, if it actually materializes, 16 P cores, 32 E cores (estimate 60% of P core, could be better) give approx 20 equivalent P cores = 36 core equivalents

So yea, given that even on the same node, AMD should be more power efficient, I would estimate approximately equal MT performance. Personally, I dont care about the MT. I am more interested in the V-cache single CCD chips. If AMD can offer a 12 core V-cache on a single CCD for a price close the the 9800 X3D that would be a killer. I dont see how Intel can match it, even if they bring on the "V-cache equivalent", (forget what they call it) they would still be limited to 8 cores on a single tile.

 

[ondma]

They only consume much less power at much lower clocks, aka much closer to their sweet-spot.
But they aren't inherently much more efficient clock for clock (compared to P-cores maybe, but not compared to Zen).


At least slightly, yes.


Not much, if any.

The new IOD and IF tech will probably save a flat ~10-15W or so vs. Zen4/5, freeing up more TDP for the cores.
N2P vs. N4P will likely allow to hit similar clocks at notably lower voltage, in addition to lower power even at same voltage.
~30% lower power consumption per core at 9950X clocks isn't unfeasible.

200W x0.7 (process) x1.5 (cores) = 210W, minus 10-15W from IOD savings = same 200W.

If the power savings are a bit higher or if they go a little more aggressive on the PPT (230W like 7950X), 100-200 MHz higher all-core sounds very much possible.
Combined with the rumored ~6% higher FP IPC and 10+% higher INT IPC, that's easily 1.6x MT perf of the 9950X.

And that's assuming uniform all-core clocks. It's possible that they'll go for more flexible clock distribution, like 1 CCD clocking at 9950X clocks and 1 CCD clocking ~200-300 MHz higher, for example.


Fair enough.

Seriously, you think 24 cores Zen 6 are going to run at the same clock (or higher!!!) as 16 Zen 5 cores at the same power? Obviously, I cant say you are wrong until the data is actually available, but that seems...... optimistic. Anyway, this in an Intel thread, so I dont want to get into an argument about Zen 6, so I wont comment further.