Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[Thunder 57]

A couple of years later DDR came out though. Also, I didn't remember P4 starving for memory .... but I could be mistaken.

With SDRAM, absolutely. RDRAM even with its high latency was far better until dual channel DDR came around the time of the P4C. The P4 gained a lot from faster FSB speeds (and L2 cache), the Athlon, not so much. P4 craved memory bandwith. I see we are off topic though so I won't comment anymore. Maybe we should have a P4 thread. @igor_kavinski , want to start one?

 

[igor_kavinski]

Also, I didn't remember P4 starving for memory .... but I could be mistaken.

https://www.aceshardware.com/pdfs/AcesHardware-45000300.pdf

All the data you need to be informed

P4 with today's even DDR4-3200 would have SCREAMED like a happy banshee upon seeing its favorite prey

 

[igor_kavinski]

Seems like they are headed that way for Nova Lake (52 cores) 2X(8P+16E)+4LPE. I think the headline will be "52 Cores!" .... and I think it will get spanked by Zen 6 and Zen 6 X3D variants in most applications and benchmarks (not Cinebench though ).

If they can demonstrate that they learned anything from their experiences with MTL-S and ARL-S and completely eradicate fabric/L3 clocking issues, they could give AMD a run for their money since AMD will basically need to rely on SMT only. My guess is that AMD's war plan is to boost internal core structures to support SMT even more so that it consistently approaches 50% or more perf uplift in embarrassingly parallel workloads. Otherwise, at something like 30% average SMT uplift, Zen 6's 48 threads will be vastly underpowered compared to Intel's 48 threads (ignore the 4 LPE cores). This is of course assuming Intel actually manages to launch that mythical monster since so far, they have had to cancel Beast Lake (their 40 thread monster) and ARL 8+32 die.

If I had to bet based on consistent execution and past performance, I would buy AMD shares. Intel just aims too high instead of taking baby steps to solve their pressing issues.

 

[igor_kavinski]

Maybe we should have a P4 thread. @igor_kavinski , want to start one?

There already is kind of one: https://forums.anandtech.com/threads/intel-had-a-7-ghz-cpu-years-ago.2608070/post-41135647

 

[LightningZ71]

Intel is in a similar position today with Arrow Lake vs. Raptor Lake as they were in the Willamette days. People like to forget that Pentium III -S Tualatin existed. Official specs topped out at 1.4 Ghz with a 133Mhz FSB, but it was trivial on decent boards to get an FSB of 150Mhz and an effective core clock of over 1.5Ghz. vs first generation DRDRAM equipped boards with sub 2Ggz P4 chips on them, it could routinely best them.

I know because I had one. The integration of the 512KB L2 cache on the processor itself was a game changer for P-III.

Raptor Lake is pushed so far beyond what it was originally intended to be that Arrow Lake is hard pressed to beat it on many benchmarks.

 

[igor_kavinski]

I know because I had one. The integration of the 512KB L2 cache on the processor itself was a game changer for P-III.

You really must've paid a pretty penny for it. 1.4 GHz Tualatin wasn't exactly a widely available CPU.

 

[OneEng2]

If they can demonstrate that they learned anything from their experiences with MTL-S and ARL-S and completely eradicate fabric/L3 clocking issues, they could give AMD a run for their money since AMD will basically need to rely on SMT only. My guess is that AMD's war plan is to boost internal core structures to support SMT even more so that it consistently approaches 50% or more perf uplift in embarrassingly parallel workloads. Otherwise, at something like 30% average SMT uplift, Zen 6's 48 threads will be vastly underpowered compared to Intel's 48 threads (ignore the 4 LPE cores). This is of course assuming Intel actually manages to launch that mythical monster since so far, they have had to cancel Beast Lake (their 40 thread monster) and ARL 8+32 die.

I have high hopes that Intel unlocks some much needed performance by lowering their latency.... but we will see.

I agree that Zen 6 is likely to be designed for "server first" and may push even further in SMT. I am not looking to see much IPC uplift though. Clockspeed may come to the rescue for AMD though for ST.

Is anyone predicting higher clocks (you know like AMD's 7Ghz!) for Nova Lake? Rumor has it that Intel might well have it on N2?

 

[igor_kavinski]

I agree that Zen 6 is likely to be designed for "server first" and may push even further in SMT. I am not looking to see much IPC uplift though. Clockspeed may come to the rescue for AMD though for ST.

I think Zen 6 will perform better more as a result of relieving fabric and RAM bottlenecks than any particular architectural revolution. It will be a slight (~15%) IPC upgrade but should perform really well in MT thanks to more data flowing through.

Is anyone predicting higher clocks (you know like AMD's 7Ghz!) for Nova Lake? Rumor has it that Intel might well have it on N2?

Looking at 285K, I'm not getting my hopes up. If they even hit 6 GHz, that will be a miracle.

 

[OneEng2]

I think Zen 6 will perform better more as a result of relieving fabric and RAM bottlenecks than any particular architectural revolution. It will be a slight (~15%) IPC upgrade but should perform really well in MT thanks to more data flowing through.

You may well be correct; however, I also expect to see a little uplift from the core given the 20% ish transistor budget increase.

I think that AMD is specifically targeting another sweep in DC. It makes me wonder what Intel is thinking with CWF and Diamond Rapids.

Looking at 285K, I'm not getting my hopes up. If they even hit 6 GHz, that will be a miracle.

Lets assume that both NVL and desktop Zen 6 will be on N2. Do you think NVL will clock as high as Zen 6?

 

[adroc_thurston]

Do you think NVL will clock as high as Zen 6?

Lmao no

 

[igor_kavinski]

Lets assume that both NVL and desktop Zen 6 will be on N2. Do you think NVL will clock as high as Zen 6?

If Coyote Cove is just Lion Cove++ (better than Panther Lake's Cougar Cove), I have to say no. I just don't see what they would do different other than bloat the core even more which would reduce any chances of clocking high.

 

[511]

If Coyote Cove is just Lion Cove++ (better than Panther Lake's Cougar Cove), I have to say no. I just don't see what they would do different other than bloat the core even more which would reduce any chances of clocking high.

Coyote Cove is client version of Panther Cove a new Core like GLC/LNC

 

[DrMrLordX]

A couple of years later DDR came out though. Also, I didn't remember P4 starving for memory .... but I could be mistaken.

With SDRAM, absolutely. RDRAM even with its high latency was far better until dual channel DDR came around the time of the P4C. The P4 gained a lot from faster FSB speeds (and L2 cache), the Athlon, not so much. P4 craved memory bandwith. I see we are off topic though so I won't comment anymore. Maybe we should have a P4 thread. @igor_kavinski , want to start one?

Blast from the past:

Pentium 4/Northwood and DDR SDRAM

Some people on these forums are of the opinion that DDR SDRAM is not enough for the Pentium 4. We know that PC133 SDRAM is not enough. But Tom Pabst seems to think that DDR SDRAM has what it takes to at least match up to RDRAM on the Pentium 4. VIA claims that their DDR chipset is matching or...

forums.anandtech.com

I remember from numerous Tom's articles back in the day that actual dual-channel DDR implementations for Northwood were competitive with RDRAM solutions at a lower price. Pretty sure the first good dual DDR400 option for Northwood came from SiS. VIA had one but it was kinda meh in comparison.

@511

Isn't Coyote Cove just ~+5% ST over Lion Cove?

 

[Fjodor2001]

What about expected frequency increase for the E cores (Arctic Wolf)?

 

[igor_kavinski]

Isn't Coyote Cove just ~+5% ST over Lion Cove?

If that's true and Intel hasn't sorted out the latency issues, they will be (insert Tom Cruise's famous elephant line from The Firm).

 

[511]

If that's true and Intel hasn't sorted out the latency issues, they will be (insert Tom Cruise's famous elephant line from The Firm).

Latency != ST performance improvement

 

[511]

Isn't Coyote Cove just ~+5% ST over Lion Cove?

Iirc yes also part of it is due to frequency it is just a refresh so I don't have hope for IPC improvement from P cores

 

[igor_kavinski]

Latency != ST performance improvement

How is it going to improve ST if it wastes cycles waiting for data to arrive?

Real applications (unlike stupid benchmarks like cinememe) have actual data they need to work on and most of it is always arriving from L3 or RAM.

 

[511]

How is it going to improve ST if it wastes cycles waiting for data to arrive?

Real applications (unlike stupid benchmarks like cinememe) have actual data they need to work on and most of it is always arriving from L3 or RAM.

If you mean L3 it has been fixed in Panther Lake

 

[igor_kavinski]

If you mean L3 it has been fixed in Panther Lake

We find out soon!

 

[branch_suggestion]

I really don't like NVLs chances at all to be competitive.
Not even convinced it will cleanly win at Cinebench at this point.
Honestly think this ends up worse than Z3 vs RKL, with the added bonus of this being an iso-node showdown so Intel cannot even win on costs.

 

[511]

I am having the same vibe as Zen5 vs ARL. Zen 6 is getting Hyped but NVL is meh in the end it will be similarish just like Zen5 vs ARL played out similar ST/MT.

 

[msj10]

I am having the same vibe as Zen5 vs ARL. Zen 6 is getting Hyped but NVL is meh in the end it will be similarish just like Zen5 vs ARL played out similar ST/MT.

7 Ghz Zen 6 is the new Zen 5 40% IPC 🤣

 

[igor_kavinski]

I'm actually expecting something good from the bLLC part.

But it's Intel. They seem to have mastered the art of throwing away their advantages. I do not even want to imagine the cringey feeling if and when Zen6X3D smashes it in places we shouldn't mention here.

 

[coercitiv]

What about expected frequency increase for the E cores (Arctic Wolf)?

I think we're likely to see another bump like the ones in the past, so 4.9-5.0 Ghz are likely. Their top turbo bin doesn't matter much though.

Not even convinced it will cleanly win at Cinebench at this point.

The top NVL-S SKU is supposed to outnumber Zen 6 in core count by 2:1. I don't see why Cinebench would be a loss or even a narrow win for NVL.