Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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Intel Core Ultra 100 - Meteor Lake

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As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



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511

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Hybrid core as a concept is great but software side was never there.
Intel offer far more advanced packaging but it results in a product with some inferior characteristic.
People care about AVX512 because Intel used to be the benchmark but now they're falling behind.
It's hard to swallow if you offer something then taking it away.

People are bashing Intel because they expect Intel offer something better.
Just a nitpick in the software it's never there you have to build it and it takes time the software side has clearly matured very much from the initial launch.
 

511

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Io Magnesso

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Intel had x86_64 they just didn't want to but yeah Intel was stupid with it so AMD did it first.
Intel was the main developer for CXL and genZ is a consortium of AMD/Intel and other CPU Vendor
https://en.m.wikipedia.org/wiki/Compute_Express_Link other two agreed
Sorry for the Japanese article, but it seems to be quite complicated.
It's not wrong that it was integrated into the CXL consortium built by Intel.
 
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OneEng2

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Would you recommend a gaming system for a person who doesn't need that much power? No.

Are you still influencing their purchasing decisions? Yes.
... and we are still talking about a fraction of a fraction of the Desktop market that is going down in volume over time.

Gaming focus seems to be the wrong strategy for x86 manufacturers if the outcome is to be profitable.
Also what standard did AMD ever introduced besides HBM?
3DNow! was a first in x86 for SIMD, Intel then countered with SSE

AMD was the first with 64bit. At the time Intel was fixated on moving everyone to VLIW with Itanic.

AMD was first with dual core. Intel countered with Pentium D.

AMD was first with functionally discrete chiplets. Intel followed with tiles only with ARL.

AMD was first with DDR while Intel tried to move the industry to RAMBUS memory so they could get licensing from us all.

AMD was first with an APU having a powerful graphics engine built in. Intel followed later but was slow to do so since they were making so much money on package deals including the graphics chip, processor and other chips on the mb.

Competition is good.
I'm sure you could find a few if you look around. One you are using right now though would be x86-64, or you know, AMD64 as it was once called :p . And before you say it was based on an Intel design, think about what Intel was trying to do back then. Force IA64 on the world while leaving x86 to die off. I think it worked out for the best in the end.
AGREE!
Hybrid core as a concept is great but software side was never there.
Intel offer far more advanced packaging but it results in a product with some inferior characteristic.
People care about AVX512 because Intel used to be the benchmark but now they're falling behind.
It's hard to swallow if you offer something then taking it away.

People are bashing Intel because they expect Intel offer something better.
Hybrid core appears to be a counter to SMT. I am not convinced it is an effective counter for the reasons you stated and a few more. Mostly, I don't believe that the PPA is as good. AMD adds ~15% die size and receives 40% MT performance improvement. That seems pretty hard to beat.

AVX512 was a disaster in the Intel implementation as it not only took a great deal of transistors, it also resulted in greatly increasing heat when utilized.... so much so that they had to clock down the core to accommodate it.

AMD has perfected what Intel introduced. Same thing with SMT.
That and two generations of desktop CPUs that had/have high failure rates.
... and there is always that. Same thing happened in the race to 1Ghz.
They didn't.
They just like SMT.
Yes they did. AMD's SMT is very potent and an extraordinary PPA addition while Intel's was not.
Also didn't AMD CEO once Said real men have fabs 🤣🤣
INDEED! And look how that turned out. What AMD found out is that they couldn't complete with a company that was amortizing their fab spend over a factor of 10 more chips than they were.

Ironic that Intel would fall prey to the same misguided business model that AMD did.
The only thing I will give AMD credit for, is Epyc and it's derivatives for the desktop, a HEDT system that is low latency, well done ! My 7960x just runs and reminds me of the x99 days.
I would (and do) argue that AMD has correctly targeted their designs as "Server First" as this provides them with the highest margins for the least volume.

All other variants for consumers are then derived from that architectural base.

AMD has provided a unique architectural add on for gamers with their X3D products. Very inventive. Just pack on a butt ton of L3 cache to limit the latency penalty of any main memory hits.
 
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AMD has provided a unique architectural add on for gamers with their X3D products. Very inventive. Just pack on a butt ton of L3 cache to limit the latency penalty of any main memory hits.
I wouldn't be surprised if it was BK who decided continuing eDRAM development was a waste of time and money for Intel and canned it. BK definitely wasn't a fool. He got what he wanted. Lots of money for his kids and grandkids at the expense of billions of shareholder value lost even after he was kicked out.
 
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Fjodor2001

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AMD adds ~15% die size and receives 40% MT performance improvement. That seems pretty hard to beat.
For comparison an E core occupies 1/3 to 1/4 die space of a P core, IIRC. So very good perf/area, and likely better than what HT would provide (or at least roughly the same).

Also, does HT really add 40% MT perf?
 
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511

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... and we are still talking about a fraction of a fraction of the Desktop market that is going down in volume over time.

Gaming focus seems to be the wrong strategy for x86 manufacturers if the outcome is to be profitable.

3DNow! was a first in x86 for SIMD, Intel then countered with SSE

AMD was the first with 64bit. At the time Intel was fixated on moving everyone to VLIW with Itanic.

AMD was first with dual core. Intel countered with Pentium D.

AMD was first with functionally discrete chiplets. Intel followed with tiles only with ARL.
Intel was the first one to do a commercial microprocessor making everything possible
😛.

also have you forgotten this?
AMD was first with DDR while Intel tried to move the industry to RAMBUS memory so they could get licensing from us all.
Wasn't IBM the one that did it first?
AMD was first with an APU having a powerful graphics engine built in. Intel followed later but was slow to do so since they were making so much money on package deals including the graphics chip, processor and other chips on the mb.

Competition is good.
That is true this is what allowed everything to happen as of now.
AGREE!

Hybrid core appears to be a counter to SMT. I am not convinced it is an effective counter for the reasons you stated and a few more. Mostly, I don't believe that the PPA is as good. AMD adds ~15% die size and receives 40% MT performance improvement. That seems pretty hard to beat.
Intel adds Cores to compensate for it the E cores are pretty hard to beat in perf/mm2 the p core just drag the overall perf/mm2 you can cram more skymont.
AVX512 was a disaster in the Intel implementation as it not only took a great deal of transistors, it also resulted in greatly increasing heat when utilized.... so much so that they had to clock down the core to accommodate it.
AMD implemented AVX-512 on a N5 Process instead of 14nm++ like Intel so the process helped here as well alongside the fact that Intel has done the grunt work for them.
AMD has perfected what Intel introduced. Same thing with SMT.
AMD taking safe approach while Intel taking risk.
... and there is always that. Same thing happened in the race to 1Ghz.

Yes they did. AMD's SMT is very potent and an extraordinary PPA addition while Intel's was not.
Yup there is no doubt about it
INDEED! And look how that turned out. What AMD found out is that they couldn't complete with a company that was amortizing their fab spend over a factor of 10 more chips than they were.

Ironic that Intel would fall prey to the same misguided business model that AMD did.
AMD never had Intel like fabs to doing innovation first before industry for decades until BK took over.
 

Fjodor2001

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dullard

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HPC is quite literally the opposite case where SMT frequently hurts the perf.
HPC with SMT is a tricky one. Initially, it tends to help a lot and that often shows up in benchmarks. So, people might think that SMT helps HPC calculations.

But as time goes by, not only does the CPU heat up, but the whole case becomes hot and reaches an equilibrium elevated temperature. Thermal limits are frequently hit and less turbo mode is activated to not exceed the limits. SMT consumes a bit more power to keep swapping all those transistors even if you fixed the frequency. Thus, over medium to long time periods, SMT is often slower in HPC because the CPU is at a lower long-term average frequency.

But few websites actually benchmark HPC for that amount of time. Certainly no mainstream reviewer does that I know of. They need to rush out their review by the deadline.

I used to run this software that took weeks to solve one problem. See their recommendation: https://ansyshelp.ansys.com/public/.../v242/en/installation/win_hyperthreading.html
 

MS_AT

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SMT is a trick to increase utilization of backend resources. If the code in question is able to fully utilize backend resources with single instruction stream (1 hardware thread) then the second instruction stream won't help, worst case it will have quite the opposite effect. But without knowing the code in question it is not possible to say if it will help or not.

HPC code is generally well optimized so often it does use the backend pretty well, and disabling SMT in the BIOS ensures the core will not enter into SMT mode accidentally due to background process noise.
 

OneEng2

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For comparison an E core occupies 1/3 to 1/4 die space of a P core, IIRC. So very good perf/area, and likely better than what HT would provide (or at least roughly the same).

Also, does HT really add 40% MT perf?
A while back I did some math on Intel E core PPA vs Zen 5c PPA with both on a theoretically even process node and it was pretty close.

Once you add in the much stronger AVX engine of Zen 5 and the other more powerful aspects of Zen 5 that become more important in DC applications, I believe that Zen 5c ends up being the better option .... but it is only my belief.

Next year we will see Clearwater Forest on 18A square off against Zen 6c Venice D on N2.

Currently, 1 Zen 5c core is about equal in performance to 1.5 Skymont cores in MT tasks in the DC. If Clearwater forest tops out at 288 cores and Venice D is at 256, it might well be a wipeout in AMD's favor. Of course, there was lots of assumptions in this set of calculations.

... and yes, in highly threaded DC applications, AMD's SMT give it ~ 40% uplift.
Intel adds Cores to compensate for it the E cores are pretty hard to beat in perf/mm2 the p core just drag the overall perf/mm2 you can cram more skymont.
I think that AMD's Zen 5c is close to or exceeds the perf/mm2 when on equal process nodes (I think).... at least for DC workloads.
 
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AcrosTinus

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A while back I did some math on Intel E core PPA vs Zen 5c PPA with both on a theoretically even process node and it was pretty close.

Once you add in the much stronger AVX engine of Zen 5 and the other more powerful aspects of Zen 5 that become more important in DC applications, I believe that Zen 5c ends up being the better option .... but it is only my belief.

Next year we will see Clearwater Forest on 18A square off against Zen 6c Venice D on N2.

Currently, 1 Zen 5c core is about equal in performance to 1.5 Skymont cores in MT tasks in the DC. If Clearwater forest tops out at 288 cores and Venice D is at 256, it might well be a wipeout in AMD's favor. Of course, there was lots of assumptions in this set of calculations.

... and yes, in highly threaded DC applications, AMD's SMT give it ~ 40% uplift.

I think that AMD's Zen 5c is close to or exceeds the perf/mm2 when on equal process nodes (I think).... at least for DC workloads.
I think you are correct, even Íntel does not like mentioning the xeon 6E. Isn't the availability of the max SKU limited as well due to lower interest? Hopefully the E-cores with AVX 10.2 can lead to some surprises.
 

OneEng2

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I think you are correct, even Íntel does not like mentioning the xeon 6E. Isn't the availability of the max SKU limited as well due to lower interest? Hopefully the E-cores with AVX 10.2 can lead to some surprises.
I don't think I have seen any benchmarks or reviews on the Xeon 6 E 288 core. Did they ever produce it?

It is my understanding that the Darkmont E cores in Clearwater Forest will only have a 256bit AVX data path (vs AMD's 512bit path). Recent benchmarks do show that a 256bit AVX performs within say 15-20% of a full 512bit path .... but when you multiply that by >200 cores, it is quite a difference.