Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[Win2012R2]

Intel terminates x86S initiative — unilateral quest to de-bloat x86 instruction set comes to an end

A pivot here, a pivot there.

www.tomshardware.com

Good riddance, this always sounded too dodgy to me (very unclear gains with risky loss of backwards comp), hopefully Intel APX will be in Panther Lake (looks like Nova lake more likely) or at the very least next Xeon 7.

 

[OneEng2]

They will publish a "performance digest" at CES showing what final ARL performance should look like after everything is patched. But overall, Hallock was more concerned about the wild variations in figures gotten by various reviewers than trying to paint the CPU as being competitive with its competition. So after all is said and done, it may still end up being boring. Just slightly less than before.

I read about someone hitting 9000 MT/s memory speed at Gear 2 comfortably. That's really nice but even that isn't supposed to give more than 15% extra perf in bandwidth starved situations and most likely only a few good bins will be able to go that high.

I have a theory that one of Arrow Lake's strengths is in bandwidth limited applications. I base this on the CB 24 vs CB 23 scores for ARL. I think that there are some serious issues with ARL with respect to latency that can not be fixed with any kind of micro-code update.

AMD understood the nature of latency limited applications like games and created the X3D architectural enhancement to address it.

Now, games are certainly not the only place where latency is important, but they are certainly a visible one.

The other architectural issue with ARL is the different core types. If an E Core gets scheduled for a task that a P core would be way better at, it gets pummeled in performance metrics.

With a more homogenous approach like Zen5/Zen5c, while you may well get penalized for such a mis-scheduling, it is much less severe.

As for Intel's release, I suspect it will certainly address some serious eye sore outliers, but for general performance improvement, I suspect we are looking at low to mid single digit gains. In games, maybe even less since I am on the bandwagon of the irreparable latency issue with ARL.

It really is amazing when you think about it. Intel has always had lower latency cache access than AMD (maybe main memory too?) as far as I can remember. It's a shame they couldn't see how poorly ARL would work with a tile architecture that hamstrung it.

The good news (IMO) is that there isn't anything fundamentally wrong with ARL with respect to high level architecture, just implementation. Panther Lake could reasonably be expected to do very well.

 

[SiliconFly]

.

 

[Saylick]

Actually, it was one of the best things if it had happened. It makes the cpu architecture very clean and very elegant, as it gets rid of lots of outdated/unwanted/redundant/useless stuff in x64 ISA. It wouldn't have made any difference to the users. All our x32 & x64 applications will still work flawlessly. In fact, neither the applications nor the users would even be aware of the changes.

Only hiccup is, Microsoft is then required to update their windows kernel code a bit and the OEMs are required to rework their BIOS a bit to reflect the changes. Not sure, but some old device drivers may also require an update (but very unlikely). Thats it.

Also, this provides the chip maker with plenty of opportunities. Less bugs, better security, better stability, more possibilities for performance optimizations and possibly a slightly thinner die. Literally no downsides. If only Intel had money...

Given that they couldn't even get ARL sorted out at launch, something tells me Intel would've just borked their attempt at a trimmed version of x86 by unknowingly breaking backwards compatibility with something legacy but otherwise essential.

 

[Win2012R2]

Only hiccup is, Microsoft is then required to update their windows kernel code a bit

If Win2012R2 does not work on it, then it ain't no good to me...

I reckon they'll revive it by working with AMD to get hardware at about the same time, otherwise it's a total loser to Intel to try.

 

[Kepler_L2]

Intel terminates x86S initiative — unilateral quest to de-bloat x86 instruction set comes to an end

A pivot here, a pivot there.

www.tomshardware.com

Good riddance, this always sounded too dodgy to me (very unclear gains with risky loss of backwards comp), hopefully Intel APX will be in Panther Lake (looks like Nova lake more likely) or at the very least next Xeon 7.

x86S was a great idea, it removed a lot of legacy platform compatibility stuff that no one uses anyway, and there were no changes to userspace applications. The reason it was killed is because x86S was done by the Royal Core team which Pat fired.

 

[Win2012R2]

x86S was done by the Royal Core team

That's Jim Keller's work?

Is there any credibility to MLID's claims about "rentable units" malarkey? It always sounded total bull(dozer) to me as I never heard any good explanation what exactly is that. Now that the team got fired one would imagine somebody would spill the beans...

 

[SiliconFly]

.

 

[Win2012R2]

Win11 doesn't run on most 7or 8 year old systems

Yes, but this is client OS that supports up to 2 CPUs and 256 logical cores for only $150, where as a basic new Windows server OS is charging a fortune for 16 cores now, at least to me that's a deal breaker: breaking x86 compatibility should come with HUGE benefits to the end user, not making life easier for the manufacturers (and Microsoft).

 

[SiliconFly]

.

 

[Win2012R2]

Does Win2012R2 even support modern systems with UEFI BIOS? I don’t think it does.

Yep, R2 boots on UEFI, supports NVMe too.

 

[poke01]

r

x86S was a great idea, it removed a lot of legacy platform compatibility stuff that no one uses anyway, and there were no changes to userspace applications. The reason it was killed is because x86S was done by the Royal Core team which Pat fired.

with this the future is RISC-V period. With ARM imploding both Qualcomm and Apple now. I can see a future where RISC-V is dominates everything.

x86 cannot survive with Intel and AMD alone. So many smart people are going to RISC-V. Give it another 5 years and we will see a core that is on par with ARMs latest.

Remember, someone has to make a RISC-V core emulate faster than a contemporary x86 cannot execute natively and then x86 is done.

 

[FlameTail]

That's Jim Keller's work?

Is there any credibility to MLID's claims about "rentable units" malarkey? It always sounded total bull(dozer) to me as I never heard any good explanation what exactly is that. Now that the team got fired one would imagine somebody would spill the beans...

MLID isn't the only who was leaking (or fabricating) details about Royal Core. There are others who tell a different tale.

https://www.reddit.com/r/intel/comments/1f945fl/some_rumors_about_the_royal_core_project

 

[csbin]

techpowerup：Arrow Lake Retested with Latest 24H2 Updates and New BIOS​

Arrow Lake Retested with Latest 24H2 Updates and 0x114 Microcode

Yesterday, Intel announced that they had root-caused the majority of Arrow Lake Core Ultra 200 performance problems, and that OS updates are already available. We tested Windows 11 24H2 with the new patches, and also compare results with 23H2 and a new motherboard BIOS.

www.techpowerup.com

 

[Hulk]

techpowerup：Arrow Lake Retested with Latest 24H2 Updates and New BIOS​

Arrow Lake Retested with Latest 24H2 Updates and 0x114 Microcode

Yesterday, Intel announced that they had root-caused the majority of Arrow Lake Core Ultra 200 performance problems, and that OS updates are already available. We tested Windows 11 24H2 with the new patches, and also compare results with 23H2 and a new motherboard BIOS.

www.techpowerup.com

Meet the new boss. Same as the old boss.

 

[ajsdkflsdjfio]

Meet the new boss. Same as the old boss.

Yup, anybody complaining about Pat's bravado gonna be in for a treat. Literally a week after being hired, the new CEO calling out Qualcomm of all people. Qualcomm isn't your competition, AMD and Apple are.

Intel’s Interim Co-CEO Throws Shade at Qualcomm PCs

Intel’s interim co-CEO Michelle Johnston Holthaus stirred the tech world with bold claims about Qualcomm PCs and the broader rise of the…

medium.com

I have no doubt Holthaus would have lost the 40% discount from TSMC as well.

 

[jdubs03]

techpowerup：Arrow Lake Retested with Latest 24H2 Updates and New BIOS​

Arrow Lake Retested with Latest 24H2 Updates and 0x114 Microcode

Yesterday, Intel announced that they had root-caused the majority of Arrow Lake Core Ultra 200 performance problems, and that OS updates are already available. We tested Windows 11 24H2 with the new patches, and also compare results with 23H2 and a new motherboard BIOS.

www.techpowerup.com

Disappointing to say the least. Bring on Panther Lake.

 

[Markfw]

techpowerup：Arrow Lake Retested with Latest 24H2 Updates and New BIOS​

Arrow Lake Retested with Latest 24H2 Updates and 0x114 Microcode

Yesterday, Intel announced that they had root-caused the majority of Arrow Lake Core Ultra 200 performance problems, and that OS updates are already available. We tested Windows 11 24H2 with the new patches, and also compare results with 23H2 and a new motherboard BIOS.

www.techpowerup.com

again, no change to speak of. Can't even beat its own chips, let alone the competition.

snooz.....

 

[Thunder 57]

r

with this the future is RISC-V period. With ARM imploding both Qualcomm and Apple now. I can see a future where RISC-V is dominates everything.

x86 cannot survive with Intel and AMD alone. So many smart people are going to RISC-V. Give it another 5 years and we will see a core that is on par with ARMs latest.

Remember, someone has to make a RISC-V core emulate faster than a contemporary x86 cannot execute natively and then x86 is done.

x86 has been "done" since the early 90's. I'll believe it when I see it. I'm not saying it won't happen. I just don't see it happening in 5 years.

 

[511]

I have a theory that one of Arrow Lake's strengths is in bandwidth limited applications. I base this on the CB 24 vs CB 23 scores for ARL. I think that there are some serious issues with ARL with respect to latency that can not be fixed with any kind of micro-code update.

AMD understood the nature of latency limited applications like games and created the X3D architectural enhancement to address it.

Now, games are certainly not the only place where latency is important, but they are certainly a visible one.

The other architectural issue with ARL is the different core types. If an E Core gets scheduled for a task that a P core would be way better at, it gets pummeled in performance metrics.

With a more homogenous approach like Zen5/Zen5c, while you may well get penalized for such a mis-scheduling, it is much less severe.

5C will be the same as E core there will be penalty if the clock difference is 20-30%

As for Intel's release, I suspect it will certainly address some serious eye sore outliers, but for general performance improvement, I suspect we are looking at low to mid single digit gains. In games, maybe even less since I am on the bandwagon of the irreparable latency issue with ARL.

It really is amazing when you think about it. Intel has always had lower latency cache access than AMD (maybe main memory too?) as far as I can remember. It's a shame they couldn't see how poorly ARL would work with a tile architecture that hamstrung it.

The good news (IMO) is that there isn't anything fundamentally wrong with ARL with respect to high level architecture, just implementation. Panther Lake could reasonably be expected to do very well.

Panter Lake is Monolithic like LNL With only GPU seperated In NVL it is similar to Clear water forest woth Hybrid Bonding

 

[511]

Meet the new boss. Same as the old boss.

Just worse imo no technical knowledge of the buisness DEI

 

[Doug S]

Actually, it was one of the best things if it had happened. It makes the cpu architecture very clean and very elegant, as it gets rid of lots of outdated/unwanted/redundant/useless stuff in x64 ISA. It wouldn't have made any difference to the users. All our x32 & x64 applications will still work flawlessly. In fact, neither the applications nor the users would even be aware of the changes.

I bet it returns eventually as part of that "x86 consortium" (or whatever it is they are calling it) with AMD, because Intel realizes they can't simply dictate the future direction of x86, but AMD needs to be on board and they'll need to get full buy in from Microsoft.

I think it will happen, but Intel has bigger fish to fry right now.

 

[511]

I bet it returns eventually as part of that "x86 consortium" (or whatever it is they are calling it) with AMD, because Intel realizes they can't simply dictate the future direction of x86, but AMD needs to be on board and they'll need to get full buy in from Microsoft.

I think it will happen, but Intel has bigger fish to fry right now.

Yeah Intel doesn't have the power to do it rn

 

[Markfw]

5C will be the same as E core there will be penalty if the clock difference is 20-30%

Panter Lake is Monolithic like LNL With only GPU seperated In NVL it is similar to Clear water forest woth Hybrid Bonding

I don't want to bring AMD up here, but I have to since you brought it up. An E core from Intel is way different in architecture then a P core. A Zen C core is almost identical to a Zen 5 core, except its shrunk in size, and runs a little slower. You can't come close to comparing the 2, apples and oranges.

 

[Hulk]

207 million over the last few years. Wow.

Intel ex-CEO Gelsinger and current co-CEO slapped with lawsuit over Intel Foundry disclosures — plaintiffs demand Gelsinger surrender salary earned

LR Trust wants Pat Gelsinger and David Zinsner to return their compensation.

www.tomshardware.com