Didn't the article say Itanium would be getting the IMC and not Xeon?
BTW, why can't a cpu be made with dual front ends, an x86 front end and then a more progressive one?
Or ditch the complexity entirely and make a dual core thats CISC for one and X86 on the other with shared cache as a transition.
The only reason this isnt done is M$.
Its there. Cedar Mill is a .65nm 2 meg Prescott (like current N0s) and Presler is dual-core Cedar Mill (total of 4)
The article is entitled "Intel?s Xeon, Itanium Processors to Integrate Memory Controllers."
Itanium will never make it to the desktop. Perhaps Apple would be willing to support it, but without MS, it has no hope in hell.
Presler will have 4mb of cache, 2mb for each core, but thats not really doubling the cache, as it's just two cedar mill die slapped together in one package, like smithfield is 2 prescotts slapped together. Cedar Mill will have 2mb of cache, yonah will have 2mb of shared cache on the dual cores, 1mb on single core. Merom will have 4mb of shared cache on dual core. There are also talks of quad cores with 8mb of cache.
It'll be on the 65nm proccess, and probably after a die shrink, so it won't really be all that big.
Let's hope Intel don't use super-dense SRAM for that 4MB cache, other wise its increase in latency will completely negate its size.
Second? How so? The i386SL had an integrated memory controller. Actually Intel has had integrated memory controllers in several CPU products over the years - most recently in the ill-fated Timnah microprocessor.
Originally posted by: Sixtyfour
But seriously, it's IBM that has excellent 65nm process that has much less leakage.
I doubt that IBM license it to Intel, but for AMD they probably will.
Yep the IBM'S are so good Apple don't want them in there watercooled machines
Intel on the yonah 2mds of shared catch Merom 4 mds of shared catch/ Everone is saying the presslers(preslers I have seen it spelled both ways LOL) Are going to be just a shrunk P4P but I did read where they added some things to it from Dothan Fusion engine and shorter pipes . I have looked everywhere for that info can't find. Oh well. In Anands latest Intel road maps Anand states its 65nano P4P but latter he says it doesn't appear that they shortened the pipes . Which tells me that Anand might have heard the same as me but it doesn't appear by the high clock speeds that the pipes were shortened 3.8 is the highest. Is it possiable (please imput your thoughts) that they could be using a northwood die . 3.8 north would be a strong performer. Part I am confused by is 90nano goes to 3.8 I would think 65nano go to 4.2 at least. Your imput please and lets play nice.
Development of PowerPC has ended ages ago, or it hasn't started properly (after the initial launch) bacause IBM saw that Apple is unable to sell those, so they lost intrest.
So basically you are comparing Apples to Oranges.
Also 65nm is not in production yet.
News about IBM 65nm
http://www.geek.com/news/geeknews/2005Jun/bch20050614030933.htm
By looking at Intels roadmap at anandtech, i was quite surprised that they release single core @65nm, but only with 2MB cache.
I expected them to add more cache to it, but no..
Maybe they are starting to like that AMD is whipping their buttocks ?
I expected them to add more cache to it, but no..
Maybe they are starting to like that AMD is whipping their buttocks ?
Originally posted by: Intelia
Originally posted by: Sixtyfour
But seriously, it's IBM that has excellent 65nm process that has much less leakage.
I doubt that IBM license it to Intel, but for AMD they probably will.
Yep the IBM'S are so good Apple don't want them in there watercooled machines
Apple sold 1.2 million mac's last quater, do you really think IBM was that arsed? I doubt Apple want Preshott's in them either, hence why they are waiting for Yonah etc
Originally posted by: Sixtyfour
But seriously, it's IBM that has excellent 65nm process that has much less leakage.
I doubt that IBM license it to Intel, but for AMD they probably will.
Actually, the 65nm development is a joint venture of IBM and AMD at the East Fishkill facility, so yes AMD will be using it too...
You have just proven that you are either stupid beyond belief, or intentionally trolling. Cache is spelled correctly in 3 posts above yours in your quotes, indicating that you read them, and you still refuse to spell it right.
Dothan fusion engine? Ive never heard any part of a microprocessor called an "engine" that term is usually used in software engineering. Changing the design of the cpu would rename the CPU, they wouldnt call it "fusion" it would have a name, much like how northwood became prescott, not "northwood fusion".
Clock speeds on pressler are only speculative now. Even people working at intel cant tell what pressler yields will be in 6 months.
A 3.8 northwood core would not be much faster than a 3.8 prescott core (this has been tested).
the pipeline has nothing to do with the process technology, i dont understand why you associated 65nm with shortening the pipeline.
All signs point to pressler sucking pretty much, the same margainal gains we got from prescott repeated.
Yonah and Meram are the cpus to watch.
We are closer to ramping up than that, probably the begining of next month.
They build up a stock pile before they release the chips, so production begins usualy 6 months or more before they are released..
TRENDING THREADS
-
Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)- Started by DisEnchantment
- Replies: 25K
-
Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads
- Started by Tigerick
- Replies: 22K
-
Discussion Intel current and future Lakes & Rapids thread- Started by TheF34RChannel
- Replies: 23K
-
News NVIDIA and Intel to Develop AI Infrastructure and Personal Computing Products- Started by poke01
- Replies: 397
Facebook
Twitter