VirtualLarry
No Lifer
- Aug 25, 2001
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That's a very good point. Perhaps these really are "glued" dice, somehow, with a seperate L3 controller chip? That would still require some pretty impressive engineering to pull off though, and the L3 would be sub-optimal in performance if all of the three dice had to access it via FSB.Originally posted by: Idontcare
It just strikes me as REALLY odd that Intel would go from dual-core straight to hexa-core monolithic Penryn die and completely skipping the quad-core monolithic rev.
Wouldn't it make much more sense to make a monolithic quad-core, with shared L3, and then stick two of those underneath the heatspreader? It would make a sweet octo-core drop-in chip.Originally posted by: Idontcare
And all this effort for an EOL architecture? How long will they make Dunnington? 9 months? It just makes no sense NOW...had they released it 6 months ago, or had a 45nm 6-core Dunnington been the follow-up to a prior released 65nm monolithic quad-core (or tri-core with L3$) then I could see the logic in the SKU progression.
