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Intel hex-core processor

AmberClad

Diamond Member
Intel six core processor.

Three dual core Penryns tacked together using Intel's patented die superglue process 😉. Thoughts?

Edit: Thanks to jones377 for an ad-free link to the info (post #9). And I'm probably wrong about the die-glue approach 😛.
 
Yes the "Shared L3 Cache" does in deed make it sound like a 6-core die, not 3 dual core die next to each other. But maybe the design is different. Doesn't normal dual cores share L2 Cache and the quad core just uses the FSB to talk to each other. So i wonder if this design is 3 dual cores glued on some "logic" glued on some L3 Cache, then the L3 Cache connects to the FSB. Which in the end i think this method would be much better than the Quad core design and how it is now.
 
Can't view the article because of a huge advertisement that blocks the pages. And no, I didn't click on it to make it go away. That would be giving them ad dollars. Try not to link to sites with this property.
 
I suspect they meant to say "16Mb shared L2 cache". As far as I know L3 cache is something AMD has started doing (if only it showed some kind of benefit), but Intel has not. Someone correct me if I'm wrong.
 
Originally posted by: keysplayr2003
Can't view the article because of a huge advertisement that blocks the pages. And no, I didn't click on it to make it go away. That would be giving them ad dollars. Try not to link to sites with this property.

im using forefox+noscript+adblockplus
looks clean to me
 
Ehh... how reliable is this site? It looks like a software development place, and they randomly heard a leak about hardware before places like Digitimes/Engadget?

It seems like a very strange product to add to their lineup; Nehalem is only a year away, and AMD is unlikely to dethrone the current quad cores before then.
 
Originally posted by: keysplayr2003
Can't view the article because of a huge advertisement that blocks the pages. And no, I didn't click on it to make it go away. That would be giving them ad dollars. Try not to link to sites with this property.

Clicking "Close this window" gives them ad dollars?
 
Originally posted by: jones377
Originally posted by: AmberClad
Originally posted by: keysplayr2003
Try not to link to sites with this property.
Help me find a link to a site with this same story and no ads, and I'll be happy to edit the link.

http://at.sun.com/sunnews/even...oad%20Show_Austria.pdf

They got the info here. It can't get much more official than this. Single die, 16MB shared L3 cache.

page 10 looks like an As seen on TV quad core advertisement 🙂
 
Originally posted by: jaredpace
Originally posted by: jones377
Originally posted by: AmberClad
Originally posted by: keysplayr2003
Try not to link to sites with this property.
Help me find a link to a site with this same story and no ads, and I'll be happy to edit the link.

http://at.sun.com/sunnews/even...oad%20Show_Austria.pdf

They got the info here. It can't get much more official than this. Single die, 16MB shared L3 cache.

page 10 looks like an As seen on TV quad core advertisement 🙂

There are some performance estimates for Nehalem on page 16
 
Originally posted by: KingstonU
I suspect they meant to say "16Mb shared L2 cache". As far as I know L3 cache is something AMD has started doing (if only it showed some kind of benefit), but Intel has not. Someone correct me if I'm wrong.

No. Intel used L3 cache back in the day of NetBurst in their Xeon lines.
 
Originally posted by: PCTC2
Originally posted by: KingstonU
I suspect they meant to say "16Mb shared L2 cache". As far as I know L3 cache is something AMD has started doing (if only it showed some kind of benefit), but Intel has not. Someone correct me if I'm wrong.

No. Intel used L3 cache back in the day of NetBurst in their Xeon lines.

L3$ dates back, way back, on both sides. Anyone here remember the K6-3? It's on-die L2$ turned the on-motherboard cache into an L3$ too.

Intel has had L3$ on their Itaniums for a while too.

Back to the OP, I was under the impression that Dunnington was a Nehalem based server chip...but it makes a ton more sense to offer socket-compatible 6-core upgrade path for existing servers.

Expect REALLY low clock-speeds though in order to fit 6-cores + all that extra cache into a 130W TDP. No 3GHz 6-core Dunningtons unless they raise TDP quite bit.
 
Nice find on the PDF - the price/performance charts are especially fun.

It's targetted at business customers who want Xeons, so who knows if we'll see a desktop part. The only mention is on page 8, where their list of "Family" products only shows it under Servers.
 
dayam...

words associated with it like tigertron, itanium, and 24 core monsters would mean..

Socket mPGA604!?!?!??!?! *sigh*

this chip is mostly out of our budget unless your a sp500 company looking for a hardcore IT upgrade.
 
Originally posted by: aigomorla
dayam...

words associated with it like tigertron, itanium, and 24 core monsters would mean..

Socket mPGA604!?!?!??!?! *sigh*

this chip is mostly out of our budget unless your a sp500 company looking for a hardcore IT upgrade.

Definitely targeted at those juicy Opteron 8xxx ASP's.
 
Originally posted by: Idontcare
Back to the OP, I was under the impression that Dunnington was a Nehalem based server chip...but it makes a ton more sense to offer socket-compatible 6-core upgrade path for existing servers.

Expect REALLY low clock-speeds though in order to fit 6-cores + all that extra cache into a 130W TDP. No 3GHz 6-core Dunningtons unless they raise TDP quite bit.

Yeah, I was under that impression too, wouldn't have guessed it was Penryn based at all.

How low will the clockspeeds go though? Remember, this chip has to outperform a 3GHz QC Xeon, otherwise it would be pointless wouldn't it? I'm not convinced it will be able to do that at, say, 2GHz, since they would both have a 'cumulative' total of 12GHz of CPU power. Whilst Dunnington does have a 16MB L3, I suspect its there to offset the limitations of 6 cores sharing a single FSB more than anything else.
 
I like the projected performance of Nehalem. And I also like the 6 core chip has a base FSB of 266.. except that it won't be available for us.
 
Originally posted by: Idontcare
Originally posted by: aigomorla
dayam...

words associated with it like tigertron, itanium, and 24 core monsters would mean..

Socket mPGA604!?!?!??!?! *sigh*

this chip is mostly out of our budget unless your a sp500 company looking for a hardcore IT upgrade.

Definitely targeted at those juicy Opteron 8xxx ASP's.

The problem of course is the same one that plagues Tigerton...it still has a FSB to contend with. That's the major reason for Nehalem in the first place.
 
Originally posted by: ViditorThe problem of course is the same one that plagues Tigerton...it still has a FSB to contend with. That's the major reason for Nehalem in the first place.

Hence the 16MB shared L3 cache...

 
Originally posted by: harpoon84
Originally posted by: ViditorThe problem of course is the same one that plagues Tigerton...it still has a FSB to contend with. That's the major reason for Nehalem in the first place.

Hence the 16MB shared L3 cache...

I agree that this might be fine for a 2P scenario, but for a 4P?
That's why I see this as an upgrade on current offerings, but not yet a competitor for the 8xxx.
Nehalem will be the first design to really compete in that area...
 
Originally posted by: Viditor
Originally posted by: Idontcare
Originally posted by: aigomorla
dayam...

words associated with it like tigertron, itanium, and 24 core monsters would mean..

Socket mPGA604!?!?!??!?! *sigh*

this chip is mostly out of our budget unless your a sp500 company looking for a hardcore IT upgrade.

Definitely targeted at those juicy Opteron 8xxx ASP's.

The problem of course is the same one that plagues Tigerton...it still has a FSB to contend with. That's the major reason for Nehalem in the first place.

Yah its really going for that course-grained multi-threaded workload which doesn't mind high(er) latencies to the main memory (the L3 is there for a good reason I suppose).

Throughput computing as SUN likes to call it, looks like Intel is working towards an x86 version of Niagara.

It just strikes me as REALLY odd that Intel would go from dual-core straight to hexa-core monolithic Penryn die and completely skipping the quad-core monolithic rev.

And all this effort for an EOL architecture? How long will they make Dunnington? 9 months? It just makes no sense NOW...had they released it 6 months ago, or had a 45nm 6-core Dunnington been the follow-up to a prior released 65nm monolithic quad-core (or tri-core with L3$) then I could see the logic in the SKU progression.
 
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