Intel has working 35 nanometer chip

[psiu]

Link to story

Neato.

 

[StrangerGuy]

They haven't even got their 0.09 micron right....

 

[Acanthus]

Repost

 

[Sonic587]

Originally posted by: Acanthus
Repost

Topic Title: Intel has working 35 nanometer chip
Topic Summary: from a Yahoo news story
Created On: 08/30/2004 09:14 PM

Topic Title: Intel Announces Chip Shrinking Milestone
Topic Summary: working .035 cache
Created On: 08/30/2004 09:37 PM

 

[Acanthus]

bah, i searched...

please make the TITLE and ARTICLE names similar so when people search we dont do exactly this...

Edit:

I would assume this uses their new SOI substrate they announced a few months ago, id love to see the heat and power dissipation on a chip with that kind of transistor density... that better be a damn good insulator

 

[IntelUser2000]

That's a typo. Look at the first paragraph which states: "The Santa Clara, Calif.-based company said Monday it has created a fully functional 70 megabit memory chip with transistor switches measuring just 35 nanometers ? about 30 percent smaller than those found on today's state-of-the-art chips."

Other paragraph: Intel said products built with its 65-nanometer process technology ? a label that describes the average size of the minuscule chip features ? are on track for delivery in 2005.

Another proof: http://www.anandtech.com/news/shownews.aspx?i=22843


Its actually 65nm process. The power improvements come from next-generation strained silicon which: "The enhanced version of strained silicon--a technology that first appeared in Intel's 90-nanometer chips--can increase performance by 30 percent compared with nonstrained chips or provide a 4x improvement in inadvertent electricity leakage."

 

[IntelUser2000]

RE: Strangerguy said: "They haven't even got their 0.09 micron right...."

What a newbish comment. Then I guess Pentium M Dothan has such lower power over 0.13 micron Pentium M because of the 0.09 micron process. NO. Its just that Prescott has over 2.5x increase in logic transistors, while Dothan has like 10-20% increase over previous gen.

 

[IntelUser2000]

Reposting

What a newbish comment. Then I guess the reason Pentium M Dothan has such low power over 0.13 micron Pentium M is because of the 0.09 micron process(If Dothan benefited from it, why not PRESCOTT?). NO. Its just that Prescott has over 2.5x increase in logic transistors, while Dothan has like 10-20% increase over previous gen.

Northwood: ~26 million for L2 cache, ~29 million for logic
Prescott: ~52 million for L2 cache, ~73 million for logic

Dothan has 2MB L2, 140 million transistors
Banias has 1MB L2, 77 milion transistors

1MB L2 is 52 million transistors, so:

Dothan has 140-(52x2)=36 million
Banias has 77-(52x1)=25 million

Only 44% increase in transistors compared to +2.5x in Prescott over Northwood. Now we see why Prescott consumes so much more over Northwood while Dothan 2.0 is cooler than Banias 1.7.

 

[Cogman]

IntelUser, I fail to see where you're going, or in fact where your comming from this.

 

[AnnoyedGrunt]

He's trying to refute the assertion that Intel doesn't have their 90nm process worked out yet.

I think Intel is doing fine on 90nm from a MFG standpoint, and agree with IntelUser that it was the design of the Prescot that aggravated any initial issues.

I think it will be quite some time before we start seeing 65nm processors though.

-D'oh!

 

[ZobarStyl]

I think the comment about 90nm not being 'right' yet is both right and wrong: the process itself works and obviously the Dothans are doing fine, but Prescotts at 3.6 are still pretty much MIA and the 4 ghz variant has been pushed back to Q1 '05 at the earliest. So if they want to use this process on Pentium-M it would likely be fine but Intel still can't ditch "Mhz is King" so they'll dump it on to Prescott which will probably have scaling problems just the same as current 90nm's do, simply because the damn thing is going too fast. So from a manufacturing standpoint, 90nm works fine. From a scaling standpoint, it hit a wall pretty fast...

 

[ReiAyanami]

they said they will keep moore's law alive thru 2005 which means 5ghz CPU's are around the corner. intel says something to the effect of "we will obliterate the competition [AMD]" even though IBM is helping AMD with its 65nm process

 

[clarkey01]

Your points are, as always, logical and well put. However, I predict Intel will find 65nm to be even more tempermental than 90nm was, and 90nm was horrific for Intel (a 120W CPU? Do I *need* a space heater in my computer case?) Where 65nm might work better will be on the Pentium-M, which doesn't need the clock rates the P4 needs in order to deliver good performance.

Intel does indeed have the advantage in manufacturing, but it also has much higher overhead than AMD. Intel spends more on R&D than AMD's entire operating budget, yet AMD is the one producing all the CPU design innovation these days. You'd think it'd be the other way around, but I think AMD's financially-driven desperation makes them better innovators. Intel can slack off and still make record profits. If AMD slacks off, they're gone.

I'm going to call this a draw, though. Your argment about Intel's lower costs is a very good one and cannot be refuted. However, AMD is a leaner, hungrier competitor and isn't afraid to go after the cheap market if it has to. AMD is used to dealing with poor financials and thin margins, Intel is not and neither are their shareholders.

Intel has it in their power to spend AMD into oblivion with price cuts, but it hasn't done so. Why? Two possibilites: either Intel feels it doesn't have to, or its shareholders have prevented it from doing so. The former argument is becoming less convincing all the time, what with Opteron taking the performance and technology crowns these days, so the latter *will* eventually come into play if it hasn't already. When it does, there's gonna be fireworks, and not the pretty kind

 

[zephyrprime]

However, I predict Intel will find 65nm to be even more tempermental than 90nm was, and 90nm was horrific for Intel

Indeed. Leakage problems only get worse at lower dimensions and I don't see intel treating the leakage problem very seriously (other than moving to the P-M).

 

[clarkey01]

I hear some talk about what the folk @ Intel call "3D" transitors to help solve this issue.

 

[Roger]

intel rules.

 

[clarkey01]

define "Rules"

 

[Cogman]

Rules, has to follow rules set by AMD, Rules. . Actually I would buy an intel, but amd offers a higher Preformance/price number.

 

[Acanthus]

Originally posted by: zephyrprime

However, I predict Intel will find 65nm to be even more tempermental than 90nm was, and 90nm was horrific for Intel

Indeed. Leakage problems only get worse at lower dimensions and I don't see intel treating the leakage problem very seriously (other than moving to the P-M).

They have selected a substrate for SOI that will be used in the .065 chips, this should bring leakage and dissipation down to AMD/IBM-like levels.

 

[clarkey01]

its Ruiz I believe rather rules.

 

[Vette73]

Originally posted by: Acanthus

Originally posted by: zephyrprime

However, I predict Intel will find 65nm to be even more tempermental than 90nm was, and 90nm was horrific for Intel

Indeed. Leakage problems only get worse at lower dimensions and I don't see intel treating the leakage problem very seriously (other than moving to the P-M).

They have selected a substrate for SOI that will be used in the .065 chips, this should bring leakage and dissipation down to AMD/IBM-like levels.

Thats good, BUT even AMD had soem growing pains useing SOI and that was with IBM's help also.

So intel will have to make some real hard adjustments to get SOI AND .065 working at the same time. AMD though already learned how to do SOI well and is moving from .13 to .09 very well as we speak.

 

[Acanthus]

Originally posted by: Marlin1975

Originally posted by: Acanthus

Originally posted by: zephyrprime

However, I predict Intel will find 65nm to be even more tempermental than 90nm was, and 90nm was horrific for Intel

Indeed. Leakage problems only get worse at lower dimensions and I don't see intel treating the leakage problem very seriously (other than moving to the P-M).

They have selected a substrate for SOI that will be used in the .065 chips, this should bring leakage and dissipation down to AMD/IBM-like levels.

Thats good, BUT even AMD had soem growing pains useing SOI and that was with IBM's help also.

So intel will have to make some real hard adjustments to get SOI AND .065 working at the same time. AMD though already learned how to do SOI well and is moving from .13 to .09 very well as we speak.

Umm isnt amds .09 late as well?

and Intel has a little more money to throw at it

 

[clarkey01]

"Umm isnt amds .09 late as well?

and Intel has a little more money to throw at it "

AMD are taking its time, why should the product be rushed and end up being a BBQ ? no insult intended to the folk @ Intel, prescott heat issue is over the top, yes its hot its just the way in which netburst was heading that alarms us all.

I think, or should I say we all think fabbin/Design of a chip is easy, there is alot of behind the curtain stuff that goes on from the bottom up, I can see very well that ppl on these kind of forums go " Why havnt we seen 2.6 Ghz (4000+) K8's yet"

Yeilds. Wafers. Volume. Product Change over. Capcity. Cost. Headroom.

I am sure its harder then we think. I doubt the ppl @ AMD are slacking or messing up.

 

[clarkey01]

And just the one fab, and from what I hear when FAB 36 is running @ acceptable yeilds when its online, FAB 30 will be converted for flash.

 

[Jeff7181]

Originally posted by: AnnoyedGrunt
He's trying to refute the assertion that Intel doesn't have their 90nm process worked out yet.

Right... 90nm vs 130nm wasn't the reason for the increase in heat... the other changes they made to the CPU where the reason for it running so much warmer.

I would assume this uses their new SOI substrate they announced a few months ago

I remember reading a year or so ago that Intel would begin using SOI with the 65nm process. However, IIRC, just recently I read an article that said Intel WON'T be using SOI with the 65nm process, instead, they're going with "improved strained silicon." As I said in a comment about the news article about this improved strained silicon... I'll believe it when I see it. They claimed that 90nm and strained silicon would give the Prescott a lot more than it did and well... take a look at it...