Intel Harpertown Xeon vs AMD Barcelona Opteron

[kknd1967]

The numbers are good for both Intel and Bracy.
However, I did not get the final claim stating 2.0G Barcy will be close to 2.66G Harperton. Look at the performance, it is pretty much the same clock-to-clock. Maybe it refers to performance/watt?

3G Harpertown vs 2G Barcy - full load performance
performance lead : performance/watt lead

bench1: AS3AP
143.5% : 111%

bench2: Scalable CPU
159% : 146%

bench3: Scalable Mixed
156% : 141%

bench4: Scalable Reads
139% : 122%

 

[OneOfTheseDays]

Learn how to read. They were comparing a 2Ghz Barcy to a 3Ghz Harpertown.

 

[kknd1967]

If you read my post carefully
you see on average 3G Harpertown is 150% faster than 2G Barcy
which means 2G harpertown will be close enough to 2G Barcy

Originally posted by: OneOfTheseDays
Learn how to read. They were comparing a 2Ghz Barcy to a 3Ghz Harpertown.

 

[Arkaign]

Originally posted by: kknd1967
If you read my post carefully
you see on average 3G Harpertown is 150% faster than 2G Barcy
which means 2G harpertown will be close enough to 2G Barcy

Originally posted by: OneOfTheseDays
Learn how to read. They were comparing a 2Ghz Barcy to a 3Ghz Harpertown.

Yep, though due to the superiority of AMD's hypertransport links, multi-socket (8-core, 16-core, and beyond) will scale better on Barcelona than on Intel's design.

So, good news for the backoffice, bad news for the desktop, for AMD.

 

[Nemesis 1]

What you said is true enough on Intels Penryn.

But by the time we get to 8 cores Intel will be on the Nehalem family of processors and than its really bad news for AMD . If you don't know what Nehalem is . Please do yourself a favor and look it up.

I do the same thing your doing but not very often.


Small rant.

As many of you know I like the Elbrus compiler and I keep bring it up . I also like the concept of mitosis which would requirer a compiler based off the Elbrus compiler concept. I keep hoping that we may see this On nehalem but did we see anything that would sugjest this will be on Nehalem . Not that we could see directly thats for fact . But I still keep looking. For signs such as this one

Google :

SKU QuickPath interconnect PCI Express lanes
Tylersburg-36D 2 -------------- 36
Tylersburg-24D 2 -------------- 24
Tylersburg-36S 1 -------------- 36
Tylersburg-24S 1 ------------- 24

Concerning the expansion of the CPU core itself of Nehalem type, still it has not become clear. But, it is the largest weak point of Core MA, it probably is secure for improvement of order fetch and the pre- decoding part to join. It is estimated that also performance at the time of 64-bit improves as the result. In the architecture aspect, as for Nehalem Penryn (pen phosphorus) from the instruction set expansion ?SSE4? of Intel which joins and, ?Application Targeted Accelerators (ATA)? for accelerator block it mounts. In addition, each CPU core Hyper-Threading similar SMT (Simultaneous Multithreading) has mounted technology. Because of that, the number of concurrency possible threads 2 times that of the number of cores, in other words, becomes 8 threads parallel with [kuatsudokoa].
In addition, Nehalem is assumed that it has ?Turbo Mode?, but at present time as for the contents it is not understood.

I found hope for mitosis in this little bit. The bolded part. Than the underlined part . SO what is turbo mode.
Gary could find this amusing as per our discussing on prerformance car engines lol!

Sure its a reach and isn't tangible and rather vague but it does give me hope. So I am not just pulling something out of the air.

What you stated was pulled out of the air and has no substance.


Who is that masked man?