And no plan B. Which I find most mind-boggling of all. Integral part of myopic overconfidence I guess.
Speaking of no plan B, the same thing happened with 10nm. There was really no fallback to hedge if 10nm didn't meet schedule.
They knew 10nm was super aggressive with their scaling targets and they thought they could do it without EUV (to give them credit, it wasn't mature enough anyways when 10nm targets were established). However, they really shot themselves in the foot by being headstrong and thinking that if they just threw more resources at the problem, they could get 10nm resolved. In hindsight, they should have either pivoted away sooner from the aggressive scaling targets and/or decide to use EUV. Meanwhile, the stars align for TSMC, who were previously a year or two behind Intel, because EUV starts to mature right when they started setting up scaling targets that could benefit from EUV. They start making orders for EUV machines while Intel still thinks they don't need them yet.
What Intel should have done is have two separate teams: one designs 10nm without EUV with relaxed scaling, and another designs 10nm with EUV but the original scaling targets. Whichever one looked more likely to meet schedule, that's the one that gets used first. Ideally it would be the traditional DUV option. Then, when the EUV option is viable, it gets used. This is no different than what TSMC did by introducing small changes across iterative nodes. The point is, TSMC develops multiple nodes simultaneously. Intel did not.