Discussion Intel Foveros, 3D stacking and the future.

[FlameTail]

Not only Intel but many other companies are working 3D/ vertical stacking of silicon chips, to potentially 'revive' Moore's Law.

https://www.google.com/url?sa=t&sou...EQFnoECEoQAQ&usg=AOvVaw2mtiQo6c9uMoUNX0k85nea

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This thread is to discuss 3D vertical stacking and the Future of Computer silicon with that technology.

 

[FlameTail]

Wouldn't vertically stacking chiplets cause the final package to be extremely thick ? This would mean that such a processor can't be used in a small form factor like laptops or phones.

 

[Doug S]

Wouldn't vertically stacking chiplets cause the final package to be extremely thick ? This would mean that such a processor can't be used in a small form factor like laptops or phones.

They thin the wafers before stacking, so a dozen chips stacked on top of each other wouldn't even add 1mm in height to the package. I think heat is a bigger issue, since you concentrate more transistors in a given area. If before you had a big chip of x transistors in 600 mm^2 but now you have that many transistors in a stacked chip in 150 mm^2, you have to move 4x the heat per mm^2.

Backside power delivery (which is still a ways out) will make this easier than the current method which is organized as a "grid" of a given pitch specific to a given process.