Discussion Intel current and future Lakes & Rapids thread

Page 743 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

DrMrLordX

Lifer
Apr 27, 2000
21,617
10,826
136
Intel is exiting the Network Switch business and RISC-V Pathfinder program.

Okay sorry I'm behind the curve but I just noticed that.

Does that mean all their comm gear is going up in smoke? Like all the equipment featuring the "Ridge" Tremont CPUs? Or am I reading that wrong?
 

IntelUser2000

Elite Member
Oct 14, 2003
8,686
3,785
136
Does that mean all their comm gear is going up in smoke? Like all the equipment featuring the "Ridge" Tremont CPUs? Or am I reading that wrong?

Network Switch business. That's their Tofino line, the one they got after acquisition of Barefoot Networks a while ago. Ridge products are Network but not a switch is it?
 

Exist50

Platinum Member
Aug 18, 2016
2,445
3,043
136

That would be promising. RPL or ADL issues are not on performance but more on efficiency. Even if there is no performance improvement and improves efficiency big time its great for the customers.
I'd be skeptical of anything regarding Meteor Lake "targets" given how much of a mess that program has been. It would be nice if they did provide a large efficiency boost. But I'll believe it when I see it.
 

Geddagod

Golden Member
Dec 28, 2021
1,148
1,005
106
I was just scrolling past some stuff when I was working on a project, when I stumbled across this
We did change the timing of Granite Rapids, and we had a big internal debate show on should we even keep the Granite Rapids name because it was the same platform, but it was a new core on a new process. So to some degree, it was a very different product. But some said, hey, you delayed Granite Rapids. Hey, I say I enhance Granite Rapids, with a much higher performance product, a much — 18% process, a major new core, that’s 10-plus percent in the core. So a much better product and aligned to the customers’ timing. And they said, hey, Sapphire Emerald Granite was too compressed.
Quote from Pat Gelsinger
Is Gelsinger trying to say 10%+ gain in IPC or performance with the GNR architecture vs redwood cove (what was supposed to go in old GNR)? Obviously I think it was a slip up, because he never really mentions any specifics about GNR again, but...
18% process is obviously referring to the gain in perf/watt from Intel 3 over Intel 4.
A major new core is something he already referenced, the new GNR on Intel 3 has a different core than GNR on Intel 4
Is 10% referring to IPC?
Or is it referring to 10% perf/watt gain? Because if Intel 3 perf and power characteristics are similar to a full node jump (18% perf gain over Intel 4 make it seem so) then isn't a 10% perf/watt gain compared to an older architecture a node behind seem kinda small?
 

Geddagod

Golden Member
Dec 28, 2021
1,148
1,005
106

That would be promising. RPL or ADL issues are not on performance but more on efficiency. Even if there is no performance improvement and improves efficiency big time its great for the customers.
Isn't this largely dependent on what performance level you measure this x1.5 efficiency at?
Because MTL might scale efficiency less at higher performance in comparison to RPL, for example at a 45 RPL part it could be 50% more effecient, but when comparing 85 to 85 watts it may only be 40% and 105 to 105 watts may only be 30%.
I might be completely wrong about this lmao, so correct me if I am
 
  • Like
Reactions: Saylick

DrMrLordX

Lifer
Apr 27, 2000
21,617
10,826
136
Network Switch business. That's their Tofino line, the one they got after acquisition of Barefoot Networks a while ago. Ridge products are Network but not a switch is it?

Okay, that's why I asked. The Ridge CPUs can potentially wind up in comm gear, but usually in someone else's implementation - not necessarily a box created wholly by Intel. If they're just killing their Barefoot lineup then that's still money wasted. Woops.
 

BorisTheBlade82

Senior member
May 1, 2020
663
1,014
106
I was just scrolling past some stuff when I was working on a project, when I stumbled across this

Quote from Pat Gelsinger
Is Gelsinger trying to say 10%+ gain in IPC or performance with the GNR architecture vs redwood cove (what was supposed to go in old GNR)? Obviously I think it was a slip up, because he never really mentions any specifics about GNR again, but...
18% process is obviously referring to the gain in perf/watt from Intel 3 over Intel 4.
A major new core is something he already referenced, the new GNR on Intel 3 has a different core than GNR on Intel 4
Is 10% referring to IPC?
Or is it referring to 10% perf/watt gain? Because if Intel 3 perf and power characteristics are similar to a full node jump (18% perf gain over Intel 4 make it seem so) then isn't a 10% perf/watt gain compared to an older architecture a node behind seem kinda small?
I bet he means 10% (IPC/Perf/Efficiency) from the core alone on top of the process gains. Also, 4nm to 3nm is more a half node, not a full node.
See also:
 

Exist50

Platinum Member
Aug 18, 2016
2,445
3,043
136
I was just scrolling past some stuff when I was working on a project, when I stumbled across this

Quote from Pat Gelsinger
Is Gelsinger trying to say 10%+ gain in IPC or performance with the GNR architecture vs redwood cove (what was supposed to go in old GNR)? Obviously I think it was a slip up, because he never really mentions any specifics about GNR again, but...
18% process is obviously referring to the gain in perf/watt from Intel 3 over Intel 4.
A major new core is something he already referenced, the new GNR on Intel 3 has a different core than GNR on Intel 4
Is 10% referring to IPC?
Or is it referring to 10% perf/watt gain? Because if Intel 3 perf and power characteristics are similar to a full node jump (18% perf gain over Intel 4 make it seem so) then isn't a 10% perf/watt gain compared to an older architecture a node behind seem kinda small?
So, I'm like 80%+ certain that the GNR definition changed (reverted?) after his remark. It sounds like he was talking about Lion Cove, but current GNR doesn't seem to use it.

It would bode well for Lion Cove it he meant 10% perf, iso-process, iso-power, but I think the statement's too ambiguous to tell, and outdated on top of that.
 

Geddagod

Golden Member
Dec 28, 2021
1,148
1,005
106
I bet he means 10% (IPC/Perf/Efficiency) from the core alone on top of the process gains. Also, 4nm to 3nm is more a half node, not a full node.
See also:
10% IPC, Perf, and efficiency are completely different IMO
10% IPC is ok. He said it was a new core, and 10% IPC gain from that is fine, but kinda underwhelming considering many 'new' architectures from Intel seem to be closer to the 15% mark (sunny cove, golden cove).
10% performance, is definitely underwhelming. Better node, new arch, and all they can eek out is 10% higher perf iso power?
10% efficiency? Don't follow efficiency as much, but using 10% less power iso perf sounds even more underwhelming than 10% perf or 10% IPC.
Intel 3 to 4 might be a half node in terms of density, but in terms of perf/watt, a 18% gain in that is certainly a full node improvement. Intel has always seemed to be really good at eeking out perf/watt gains in the same node, for example for Intel 10nm, Intel 7 was a 10-15% perf/watt improvement over Intel 10ESF, and Intel 10ESF was another 17-18% perf watt gain over Intel 10nm itself. Intel 10nm was the base for all of those variants too, if I'm not mistaken. So the fact that on a full node level of perf improvement, if they were only able to eek out 10% from the core in perf...
And maybe you are right that he meant 10% better core alone on top of process gains, but to me idk, cuz that implies they tested that 'new' architecture on both Intel 3 and Intel 4 to get that information. Which doesn't really make much sense to me, because chronologically it sounds like they had an architecture on GNR with Intel 4, moved GNR to Intel 3, and decided to uplift the architecture a bit since they are moving to a better node anyway. So why test the new 'updated' architecture on Intel 4 as well? Unless they just estimated it, like saying the arch should clock 5% faster and have 5% higher ipc...
I think 10% IPC makes the most sense.
 
  • Like
Reactions: ftt

Geddagod

Golden Member
Dec 28, 2021
1,148
1,005
106
So, I'm like 80%+ certain that the GNR definition changed (reverted?) after his remark. It sounds like he was talking about Lion Cove, but current GNR doesn't seem to use it.

It would bode well for Lion Cove it he meant 10% perf, iso-process, iso-power, but I think the statement's too ambiguous to tell, and outdated on top of that.
The timeline for that would have to be pretty tight for that, no?
The development cycle for GNR is most likely going to be longer than that of RPL, at the primary basis of it being a server CPU, (that and RPL was very fast, Intel claims they shrunk the timeline by 6 months compared to ADL) but using it as a meter stick:
So 30 months out, and the Pat quote was from March 2022, assuming a end of 2024 GNR release date, would give us what, a 3 month time frame for a redesign? But also considering following ADL schedule means that we would be looking at the change in design having to be 36 months out... but chiplets should also reduce the time needed in the design phase...but GNR is also a server CPU, which I'm assuming will take longer to develop
Unless they were designing multiple GNR potential variants in parallel, I don't see another change past what Pat was talking about happening. Window just sounds way too tight for that to happen.
Also, we got the GNR announcement in mid 2021, for a likely end of year 2023 launch. 2 and a half years. The GNR redesign Pat quote is also, 2 and a half years out from it's supposed launch date.
I don't think it would use Lion Cove though, because that seems to essentially be a backport since Lion Cove seems to appear on ARL which has Intel 20A compute tiles (or TSMC 3nm). And backporting on Rocket Lake did not turn out looking so well...
It's definitely ambiguous though, but I love making mountains out of molehills haha :smile:
 

Exist50

Platinum Member
Aug 18, 2016
2,445
3,043
136
The timeline for that would have to be pretty tight for that, no?
The development cycle for GNR is most likely going to be longer than that of RPL, at the primary basis of it being a server CPU, (that and RPL was very fast, Intel claims they shrunk the timeline by 6 months compared to ADL) but using it as a meter stick:
So 30 months out, and the Pat quote was from March 2022, assuming a end of 2024 GNR release date, would give us what, a 3 month time frame for a redesign? But also considering following ADL schedule means that we would be looking at the change in design having to be 36 months out... but chiplets should also reduce the time needed in the design phase...but GNR is also a server CPU, which I'm assuming will take longer to develop
Unless they were designing multiple GNR potential variants in parallel, I don't see another change past what Pat was talking about happening. Window just sounds way too tight for that to happen.
Also, we got the GNR announcement in mid 2021, for a likely end of year 2023 launch. 2 and a half years. The GNR redesign Pat quote is also, 2 and a half years out from it's supposed launch date.
I don't think it would use Lion Cove though, because that seems to essentially be a backport since Lion Cove seems to appear on ARL which has Intel 20A compute tiles (or TSMC 3nm). And backporting on Rocket Lake did not turn out looking so well...
It's definitely ambiguous though, but I love making mountains out of molehills haha :smile:
So combining a bit of rumor, chatter, and speculation together, I think the sequence was something like RWC (Intel 4) -> Lion Cove (Intel 3) [Pat statement] -> RWC+(?) (Intel 3). So in that sense, it would be more like a reversion to the foundation most of the work was done on. But either way, I agree that at this point, Lion Cove isn't likely. It should be easier to port around than RWC, but 3 entirely different nodes would be too much.

I wouldn't be so hasty to draw those conclusions about backporting however. Sunny Cove just wasn't a good uarch. The node shrink helped mask that a little, but Ice Lake still wasn't great. And perhaps the bigger factor was Raptor Lake also got the uncore changes, which are really what hurt it for gaming.

My blind guess is that Lion Cove timelines are the limiting factor. We know they originally wanted it in 2023 for N3 Arrow Lake, but that's clearly been pushed into 2024. If server had to absorb a similar delay, that would likely push GNR into 2025, which would be a death sentence for Intel in servers.
 
  • Like
Reactions: Geddagod

Geddagod

Golden Member
Dec 28, 2021
1,148
1,005
106
I wouldn't be so hasty to draw those conclusions about backporting however. Sunny Cove just wasn't a good uarch.
Why so? I though Tiger Lake was a pretty good CPU, and the only changes to that vs Sunny Cove was tweaking the cache subsystem right? I thought Icelake's initially low clocks was due to the shitty 10nm process.

And perhaps the bigger factor was Raptor Lake also got the uncore changes, which are really what hurt it for gaming.
Oh ye I totally forgot about that. Good point.
I guess I shouldn't discount backporting as much.
 

mikegg

Golden Member
Jan 30, 2010
1,755
411
136
I'd be skeptical of anything regarding Meteor Lake "targets" given how much of a mess that program has been. It would be nice if they did provide a large efficiency boost. But I'll believe it when I see it.
Seems believable given that it's Intel 4 vs Intel 7 and it will have two new cores.
 

BorisTheBlade82

Senior member
May 1, 2020
663
1,014
106
@Geddagod
With the brackets I just wanted to express, that from the quote alone it is not clear what he meant. If I would have to guess, it would be IPC or Perf (IPC and higher clock range due to architectural changes) at ISO process.
Also, no need to test them on Intel4 and Intel3. Simulation is a thing in semiconductor design.
 

Exist50

Platinum Member
Aug 18, 2016
2,445
3,043
136
Why so? I though Tiger Lake was a pretty good CPU, and the only changes to that vs Sunny Cove was tweaking the cache subsystem right? I thought Icelake's initially low clocks was due to the shitty 10nm process.
Willow Cove probably made some minor backend adjustments to Sunny Cove. Pushing down power, and pushing up clocks. That sort of thing. But yes, while the clocks for Sunny Cove were clearly mostly 10nm's fault, it was a pretty huge increase in transistor count (and corresponding power and area) for the IPC gain, especially considering how long it took to come out after Skylake. In large part responsible for Intel's current PPA deficit vs AMD.
Seems believable given that it's Intel 4 vs Intel 7 and it will have two new cores.
I think that "new cores" part is the subject of some debate. And also what gains Intel 4 will provide outside of powerpoint slides.
 

Exist50

Platinum Member
Aug 18, 2016
2,445
3,043
136
Early V-RAY Results for Sapphire Rapids Xeon W

Probably an ES, or something off with power limits. It's losing to a 13900k in a task that should benefit substantially from its better memory bandwidth and AVX throughput.
 

nicalandia

Diamond Member
Jan 10, 2019
3,330
5,281
136
Well clearly something is up. Over double the cores, and only 1/3rd faster? If that memory is meant to be DDR5-3466, then that might explain it, but that doesn't mesh too well with the Threadripper results. Eh, couple of weeks and we'll get final answers.
it could be that Windows 10 just does not play nice with Sapphire Rapids
 

Exist50

Platinum Member
Aug 18, 2016
2,445
3,043
136
it could be that Windows 10 just does not play nice with Sapphire Rapids
Hm, perhaps. Shouldn't have any particular issues though. No big.little or anything.

Threadripper winning for an int workload by this kind of margin, iso core count, wouldn't be very unusual, but I thought V-Ray was basically a best case scenario for SPR. Heavily dependent on AVX throughput.